sweet!!! CE hw finally finished

vshah

Lifer
Sep 20, 2003
19,003
24
81
i'm just so happy, i thought i'd post about it :)


Sun Microsystems Inc. SunOS 5.9 Generic May 2002
CLUSTER TELNET/SSH USERS: ("Greek" Linux cluster (HH1107)/Sunblade 100)
The password file from pegasus is copied to all cluster machines every night.
If you have an account on pegasus then you also have accounts on these:
bash-2.05a$ vlog *.v
ncverilog: 04.10-s011: (c) Copyright 1995-2003 Cadence Design Systems, Inc.
file: chess.v
module worklib.chess:v
errors: 0, warnings: 0
file: chesstester.v
module worklib.chesstester:v
errors: 0, warnings: 0
file: system.v
module worklib.system:v
errors: 0, warnings: 0
Caching library 'worklib' ....... Done
Elaborating the design hierarchy:
Building instance overlay tables: .................... Done
Generating native compiled code:
worklib.chess:v <0x19d927c1>
streams: 4, words: 128
worklib.chesstester:v <0x2dcb95fa>
streams: 2, words: 1439
Loading native compiled code: .................... Done
Building instance specific data structures.
Design hierarchy summary:
Instances Unique
Modules: 3 3
Primitives: 33 3
Registers: 6 6
Scalar wires: 19 -
Initial blocks: 1 1
Pseudo assignments: 4 4
Writing initial simulation snapshot: worklib.system:v
Loading snapshot worklib.system:v .................... Done
ncsim> source /usr/cds/ldv-4.1/tools/inca/files/ncsimrc
ncsim> run
0 X1 = x X0 = x Y1 = x Y0 = x Z1 = x Z0 = x Lx = x Ly = x Lz = x
50 X1 = 1 X0 = 0 Y1 = 0 Y0 = 1 Z1 = 1 Z0 = 0 Lx = x Ly = x Lz = x
80 X1 = 1 X0 = 0 Y1 = 0 Y0 = 1 Z1 = 1 Z0 = 0 Lx = 1 Ly = 1 Lz = 1
100 X1 = 0 X0 = 1 Y1 = 1 Y0 = 0 Z1 = 0 Z0 = 1 Lx = 1 Ly = 1 Lz = 1
130 X1 = 0 X0 = 1 Y1 = 1 Y0 = 0 Z1 = 0 Z0 = 1 Lx = 0 Ly = 1 Lz = 0
Simulation complete via $finish(1) at time 150 NS + 0
./chesstester.v:16 #50 $finish;
ncsim> exit
bash-2.05a$
 

vshah

Lifer
Sep 20, 2003
19,003
24
81
Originally posted by: Shawn
chess?

it tests for collisions between chess pieces in a 2x3 space, will eventually be integrated into a larger design...this was our first lab.
 
Aug 25, 2004
11,151
1
81
Originally posted by: vshah
Originally posted by: Shawn
chess?

it tests for collisions between chess pieces in a 2x3 space, will eventually be integrated into a larger design...this was our first lab.

oh boy, last year we had a HW assignment where we had to write the AI behind a chess game... in lisp. Almost killed myself in frustration coding that :(

A :cookie: for you for doing this in verilog :)
 

BigPoppa

Golden Member
Oct 9, 1999
1,930
0
0
Originally posted by: George P Burdell
Originally posted by: vshah
Originally posted by: Shawn
chess?

it tests for collisions between chess pieces in a 2x3 space, will eventually be integrated into a larger design...this was our first lab.

oh boy, last year we had a HW assignment where we had to write the AI behind a chess game... in lisp. Almost killed myself in frustration coding that :(

A :cookie: for you for doing this in verilog :)

Assuming by your username, you really coded that in Scheme? God damn GT CS classes were horrible. I would have ended myself if chess or any sort of AI came up in class.

Whats the good word?
 

vshah

Lifer
Sep 20, 2003
19,003
24
81
today my prof tells me that this design is extremely simple, compared to the "20,000+ gate cpu" we'll be designing at the end of the semester. :Q
 

slpaulson

Diamond Member
Jun 5, 2000
4,414
14
81
Originally posted by: vshah
today my prof tells me that this design is extremely simple, compared to the "20,000+ gate cpu" we'll be designing at the end of the semester. :Q

I did that last semester. Hopefully they don't make you do a pipelined cpu...