Stupid pointless question-how many integer execution units does Phenom 2 have?

[Wolfpup]

I'm thinking it's 3 per core, versus 4 in Core 2, i7, and Sandy Bridge?

I have absolutely no particular reason to ask, I'm just trying to refresh my memory...seems like it's wider than the Pentium 4 was, but narrower than the newer ones?

 

[lamedude]

3 for both (K8&K10 are the same)

 

[AtenRa]

If we want to be technically correct each core has one (1) Integer Execution Unit. Each Integer Execution Unit has 6 pipelines (or ports), 3 ALUs and 3 AGUs but only 3 of them can return a result per cycle.

 

[HW2050Plus]

I'm thinking it's 3 per core, versus 4 in Core 2, i7, and Sandy Bridge?

I have absolutely no particular reason to ask, I'm just trying to refresh my memory...seems like it's wider than the Pentium 4 was, but narrower than the newer ones?

Phenom has 3 ALU per core and 3 AGU per core.
Sandy Bridge has 3 ALU per core and 2 AGU per core.
Bulldozer has 2 ALU per core and 2 AGU per core.

Phenom can issue 3 ALU or AGU / cycle. 3 in total.
Sandy Bridge can issue 3 ALU / 1 AGU or 2 ALU / 2 AGU per cycle. 4 in total.
Bulldozer can issue 2 ALU and 2 AGU per cycle. 4 in total.

So the funny thing is that despite Phenom has the most units of all they can issue the least amount / cycle.

That is all regarding pure integer code only. If FPU/SSE instructions are scheduled as well, the integer throughput for Sandy Bridge drops significantly.