Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

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Vattila

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Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

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What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts! :)
 
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tamz_msc

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First, I think we all agree that currently its niche. HOWEVER, now that it will be more widely available for use, there might be more applications that use it.
30 million TGL CPUs shipped till Q1 2021, and probably much more since then. Yet AVX512 adoption remains niche. What's so special about Zen 4 that it will change the outlook of AVX512 adoption in the future?
 

nicalandia

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30 million TGL CPUs shipped till Q1 2021, and probably much more since then. Yet AVX512 adoption remains niche. What's so special about Zen 4 that it will change the outlook of AVX512 adoption in the future?
You mean TGL Laptop low power CPUs with partial AVX-512 Support that nobody cared it had and disable it if they could so they they could save on battery power? Really? Those are not the Power Users AVX-512 is design for. Zen4 will change that.
 

.vodka

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This circlejerk with Sandra scores that has been going on in the past few pages of this thread, and those hyping it up.

Sisoft did the same with their Zen3 results before NDA was up.

Their synthetic suite predicted quite well how things did in real life not much later. You can find all these posts in the Zen3 speculation thread. If people light up at the results (me included) it's because there's precedent that it was useful on a previous hardware release.

I wouldn't call it a circlejerk. As stated above, it's valid data.

Besides, they show a nice performance increase on non AVX-512 based tests, that's what should get you interested (apart from the legacy code/non vector speedup), not the niche AVX-512 stuff. Having support for it is the icing on the cake, more widespread hardware support apart from all the ICL/TGL stuff is required for the features to be actually used and developed for outside HPC use cases.


As I said above, now we need real world leaks to validate these results before the reviews become available. Someone will probably leak something this remaining week. People did with Zen3.
 
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tamz_msc

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You mean TGL Laptop low power CPUs with partial AVX-512 Support that nobody cared it had and disable it if they could so they they could save on battery power? Really? Those are not the Power Users AVX-512 is design for. Zen4 will change that.
You have no idea about TGL and AVX512 and its use cases. For starters, there are no laptops that disable AVX512 to save on battery power.
 
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nicalandia

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You have no idea about TGL and AVX512 and its use cases. For starters, there are no laptops that disable AVX512 to save on battery power.
I did say "If they could" and TGL CPUs do have only one AVX-512 FPU, Ice Lake Xeons have two. Of all CPUs possible you had to name a TGL Laptops as to why AVX-512 has not seen more wide spread adoption? For starter Zen4 as design will be using the same AVX-512 Design on the whole line of products(Servers, HEDT, Mainstream, Budget, Laptops), you can bet that the adoption rate will increase significantly.
 

tamz_msc

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I did say "If they could" and TGL CPUs do have only one AVX-512 FPU, Ice Lake Xeons have two. Of all CPUs possible you had to name a TGL Laptops as to why AVX-512 has not seen more wide spread adoption? For starter Zen4 as design will be using the same AVX-512 Design on the whole line of products(Servers, HEDT, Mainstream, Budget, Laptops), you can bet that the adoption rate will increase significantly.
The number of FPU units in a core has no bearing on AVX512 adoption. The fundamental issue had always been that vectorizing code to improve performance is difficult. AVX512 is supposed to help in making things easier.
 
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nicalandia

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Sisoftware brings a valid point that I have not seen referenced by previous leaks.

"By disabling/not-using AVX512 it is possible to reduce turbo power and thus make Zen4 more power efficient."

Let see how much more efficient is Zen4 with AVX-512 Disabled. AMD invested heavily on AVX-512 Implementation, doubled the FPU Units from two 128 FPU to two 256 FPU that takes a large chunk of die area and surely a few more watts.

Let see if day one reviewers are aware of this and test with and without AVX-512
 
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tamz_msc

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I agree, but my point is still valid. AMD will be "Spamming" their whole product portfolio with AVX-512 from Zen4 onward, that will greatly help adoption
Zen 4 having AVX512 across the entire range of products will not magically solve the fundamental problem of vectorizing code.
PS3 emulator will FLYYYYYY on Zen 4.
RPCS3 benefits from AVX-512 because of the unique architecture of the Cell processor, and some quirkiness with how it handles floats, which can be emulated with AVX-512.
 

Hitman928

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Some kind of switch enable AVX512 = disable e-cores and vice-versa.

And when the vast majority of users don't know about the switch or how to use it and start experiencing crashes with their Intel PC, who takes the blame? This is a customer support nightmare scenario for Intel which is why they disabled/fused off AVX512 to begin with.
 

Rigg

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The way I see it, AMD has absolutely no chance of winning with the 6 and 8 core variants especially if the 13600K ends up below $350.
13400 & 13600k do look to be tough match ups for 7600x & 7700x. I expect them to be very comparable in lightly threaded tasks and gaming while the raptor lake parts should have an advantage in heavy multi-thread. I wouldn't even consider a 7600x or 7800x until b650 and raptor pricing/reviews are available. How the actual street pricing on those 4 SKU's shakes out in a couple months will be interesting.
 

moinmoin

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I was prretty much dead-on. No surprise tho. Seemed very predictable.
Predictable is good.

Then why are we pretending that all that will suddenly change just because Zen 4 has now adopted it?
DYI desktop is the place where people push their hardware to the max. Vectorized code for AVX-512 is almost indecent in overburdening the CPU. People will still push it to the max. (I on the other hand will likely disable or heavily limit it though due to my love of U-series style efficient chips...)

Personally I'd still prefer an approach akin to SVE2 over what AVX-512 did to add 512-bit support. That aside plenty instructions in AVX-512 are actually an improvements over previous AVX instruction sets and offer 256-bit and 128-bit versions of them. Having them available in a mainstream client platform is certainly no loss. The bonus of having creative applications of the instructions like mentioned for emulators see more widespread use is nice as well. (ADL could have been in that position as well.)
 

nicalandia

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Timmah!

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And when the vast majority of users don't know about the switch or how to use it and start experiencing crashes with their Intel PC, who takes the blame? This is a customer support nightmare scenario for Intel which is why they disabled/fused off AVX512 to begin with.

Well, e-cores enabled and avx-512 disabled by default. The chances are, people who actually can use of avx are knowledgeable enough to find out about the switch and use it, if they need so.
 

tamz_msc

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DYI desktop is the place where people push their hardware to the max. Vectorized code for AVX-512 is almost indecent in overburdening the CPU. People will still push it to the max. (I on the other hand will likely disable or heavily limit it though due to my love of U-series style efficient chips...)
The last thing you want with AVX512 is to push FP instructions with it to the max. Even something like RPCS3 does not use it that way because of the added power consumption.
 

moinmoin

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The last thing you want with AVX512 is to push FP instructions with it to the max. Even something like RPCS3 does not use it that way because of the added power consumption.
As I wrote I fully agree. We will still see this happen because one can (and I dread it already).