Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

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Vattila

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Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

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What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts! :)
 
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moinmoin

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As far as we know Rembrandt Desktop is still being released on time, sometime in Q2.
Never said otherwise. I was talking about AMD previously stating AM4 being supported through 2020, implying that the successor should arrive in 2021. Rembrandt Desktop was always for 2022 in any case, which made me think Warhol was an AM5/DDR5 chip for 2021 which was then scrapped along an AM5 platform launch this year. But as I wrote: Who knows...
 

DrMrLordX

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It certainly does seem that AMD is taking their sweet time getting something onto the market beyond Vermeer. And their tight-lipped nature leaves us all speculating. I agree that Warhol may be scrapped entirely. But how would we ever know? They could even repurpose the name to a new product. Zen3d may wind up being Warhol even if it wasn't Warhol to begin with.
 

Ajay

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"In Design" for something which they have silicon in their hands is a bit of a stretch
You cannot tape out something if you have not finished implementation. And you cannot implement something if you have not designed and completed design validation.
So you can say implementation is more or less completed and waiting for the steppings and doing bug fixes.

Architecture would needed to be finished even way back to three years ago or even earlier.
IIRC in 2018 on Zen one year anniversary, Mike Clark said he was already working on Zen 5 architecture

But like @uzzi38 said, in the future we can expect at best only "On Track" for launch at an unknown date in the future, that too provided they disclose something like there is a Zen 5 in the first place.
Thinking about it, now I am not sure they will even acknowledge there is a Zen 5 :confused:
There will only be noise on threads like this. Like how people are guessing what Apple's next chip will be. They don't even know the name forget architecture features

I understand - I was trying to point out that the timeline seems a bit off. Mike Clark is working early on the high level design goals and perhaps the floor plan. Then his team sets out a requirements document and finally the engineers fire up their various semiconductor CAD tools and get to work. So he is ahead of the design team (and needs to be). My supposition is that the engineers came from the Zen2 team, and have had ~3 years to design Zen4. Given Keller's development structure of smaller teams and 'rapid' design - it seems reasonable that 3 years would be enough.

I do agree that the new ‘feature' of limited transparency, compared to the past, will create more thunder than lightning.
 

eek2121

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Rembrandt is in the Gigabyte leak on AM5 supported platforms. Not by name, but it's very obviously one of the 3 chip families listed as being on the platform at this date.
How is it obvious?
What are the things you've seen that point to it being mobile-only? I haven't seen any and in absence of that I think it would be reasonable to weakly expect AMD to continue how they did things with the preceding APUs?
References to a U and H part, but none to a G part. No references about a socketed version either.
 

uzzi38

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How is it obvious?

References to a U and H part, but none to a G part. No references about a socketed version either.
I/O and family number (19h) match up, model number is lower than Raphael. Also one more thing I don't know the specifics about and why it's the case, just the fact that it is indeed the case.
 

eek2121

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1629906220676.jpeg

Looks like 3 SKUs total. Type 1 could be Rembrant/Barcelo. I say this because 1 model has USB4 and 1 doesn’t. However, this could also be OEM/Non-OEM chips or chips without GPUs vs. with. Remember Raphael will have a GPU on certain SKUS.

Types 2 and 3 are interesting. Type 2 has 28 pcie lanes, but no USB4, Type 3 has 20 pcie lanes, but with USB4.

That being said, I am not saying it won’t happen, it actually makes complete sense, but I would expect it to launch with Raphael.
 

uzzi38

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View attachment 49300

Looks like 3 SKUs total. Type 1 could be Rembrant/Barcelo. I say this because 1 model has USB4 and 1 doesn’t. However, this could also be OEM/Non-OEM chips or chips without GPUs vs. with. Remember Raphael will have a GPU on certain SKUS.

Types 2 and 3 are interesting. Type 2 has 28 pcie lanes, but no USB4, Type 3 has 20 pcie lanes, but with USB4.

That being said, I am not saying it won’t happen, it actually makes complete sense, but I would expect it to launch with Raphael.

Right below the table it actually says that Type 2 will have OPNs with and without iGPUs.

Type 3 is Phoenix.

Also, I don't expect Rembrandt to launch on the desktop that late.
 

Mopetar

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The vcache is not free. The additional wafer costs money, the stacking process costs money. Higher prices are going to be needed just to maintain margins and I think they want to go beyond that.

That's why I don't think we see Zen 3D as a full stack refresh. Instead there's one or two high-end premium products for desktop with most of the chips going into HEDT or even the server line where AMD can charge an even larger premium. The desktop CPU is just for bragging rights.

I already mentioned DDR5.

It's notable that AMD always stated AM4 will be supported through 2020. So AM5 relying on DDR5 but still not launched makes me think DDR5 is indeed the holdup there.

Isn't Intel launching with DDR5 support before AMD though? I think that's going to drive the market and actually help ensure there's more reasonable availability by the time AMD releases Zen 4.

Alder Lake will have faster single threaded and multithreaded performance than Zen 3 with the possible exception of the 5950X (though it may beat that chip as well). AMD absolutely needs every tool in it’s war chest. If we are lucky, Zen3D will help AMD catch up.

I think Intel may have a tough time consistently beating a 5950X and as long as AMD has that as a halo product they're fine. Even if it does get beat, they just need one Zen 3D chip to act as a new halo product.

Most people never buy the top-end chip, but for whatever reason a lot of people think that it somehow matters. AMD doesn't need Zen 3D to be widely available to retain any mindshare they've gained from being on top.

They aren't going to be making an $250 Zen 3D products though. They really don't even have any sub-$300 Zen 3 products as is outside of the 5600G.
 

jpiniero

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That's why I don't think we see Zen 3D as a full stack refresh. Instead there's one or two high-end premium products for desktop with most of the chips going into HEDT or even the server line where AMD can charge an even larger premium. The desktop CPU is just for bragging rights.

There's always rebrands. Threadripper AFAIK isn't getting vcache (at least not for now). Only desktop and server.
 

Joe NYC

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Seems odd to slot in a Zen3D product that probably won't launch in any appreciable volume until early next year that will be refreshed in under 12 months going by AMD's schedule.

Assuming a more optimistic launch of Zen 4 around this time next year then AMD is really giving that a short life as a product.

Given that AMD still has a lot of the product stack to fill in with Zen 3, it would be surprising if they launched these as anything other than some special Ryzen 5000 parts. Something similar to the XT parts that Zen 2 used as an update/refresh towards the end of the cycle.

So you take too pessimistic launch for Zen 3D and too optimistic launch for Zen 4 and the result does not make sense.

If you correct those two (too pessimistic on Zen 3D launch and too optimistic on Zen 4 launch) than thing start to make sense..
 

moinmoin

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Isn't Intel launching with DDR5 support before AMD though? I think that's going to drive the market and actually help ensure there's more reasonable availability by the time AMD releases Zen 4.
Indeed.

In that regard I think it's telling that ADL seems to start with top-end SKUs only this year, chips that are as you rightly note a relative niche quantity wise. I get the feeling both AMD and Intel originally planned with higher availability of DDR5 this year already.
 
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Timorous

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They aren't going to be making an $250 Zen 3D products though. They really don't even have any sub-$300 Zen 3 products as is outside of the 5600G.

The 5600G uses more 7nm silicon than a 5600X-3Dnow! would.

Like I have said I can see Zen 3D being the 'budget' platform and Zen 4 being the premium platform for a while next year until DDR5 comes down in price.
 
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krumme

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With aprox 80mm2 die it seems to me zen3 was envisioned as a budget alternative for a compettitive landscape where Intel was far stronger.
On a depreciated platform meant for budget, they can now dump some cache on top and still be a viable compettitor not only at budget end. They are in a damn strong position to price this product and still have good margins whatever perf alderlake comes with.
I think the problem is the time right up before zen 5. Zen 5 is supposed to be same uplift as zen. Zen 4 will have a hard time with the alderlake facelift, as its new expensive platform where tco will be at least as high as Intel - io 6nm, ddr5, beefier mb for avx512.
 

DisEnchantment

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With aprox 80mm2 die it seems to me zen3 was envisioned as a budget alternative for a compettitive landscape where Intel was far stronger.
On a depreciated platform meant for budget, they can now dump some cache on top and still be a viable compettitor not only at budget end. They are in a damn strong position to price this product and still have good margins whatever perf alderlake comes with.
I think the problem is the time right up before zen 5. Zen 5 is supposed to be same uplift as zen. Zen 4 will have a hard time with the alderlake facelift, as its new expensive platform where tco will be at least as high as Intel - io 6nm, ddr5, beefier mb for avx512.
The perception of AMD changed with the times and if performance is there, they can command the price they see fit, see 5950X.
Based on leaks from reputable twitter individuals, a conservative estimate of a bump of 30% more MTr and a healthy reduction of 15-20% power at iso transistor perf (considering the fact that N7 transistor perf is already high, touching 5GHz) are quite significant.
If the same design and implementation teams don't falter, not only will they have so much more silicon to work with (30%+ more), they will have much more power headroom, (20%+ more power from process for CCD and add to that the increased socket TDP and the savings from the N6 cIOD)
For reference, the Zen3 team delivered 19% IPC from 9% area gain (at iso power according to AMD)

Or if we put the other way around, if AMD discards the efficiency gain and just go with transistor perf, they have +30% more transistor perf from process, While not all of that will translate into CPU clock speed, assuming design is compatible they can start clocking the cores higher than 4GHz base
 
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Mopetar

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The 5600G uses more 7nm silicon than a 5600X-3Dnow! would.

Like I have said I can see Zen 3D being the 'budget' platform and Zen 4 being the premium platform for a while next year until DDR5 comes down in price.

I'm the end it's ~115 mm^2 vs. ~175mm^2 and ignoring the cost of the silicon for the IO die completely. Sure it wins if your only costs are 7nm wafers, but that's not the only cost and even though none of the others are as large as wafer costs all the extra little costs add up.

Cezanne is less complicated to package though and that's not even considering the extra step of bonding the extra cache to a Zen 3 chiplet. I assume there's a small failure rate with that process stage the wastes otherwise good silicon so that adds a bit of extra cost as do some of the other steps necessary for producing Zen3D.

There's also no reason to make a 3D 5600X. I doubt we don't see any products that aren't using 8-core chiplets. No one will care about higher DDR5 prices because they'll already be paying a lot for the premium high-end CPU.
 

Timorous

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I'm the end it's ~115 mm^2 vs. ~175mm^2 and ignoring the cost of the silicon for the IO die completely. Sure it wins if your only costs are 7nm wafers, but that's not the only cost and even though none of the others are as large as wafer costs all the extra little costs add up.

Cezanne is less complicated to package though and that's not even considering the extra step of bonding the extra cache to a Zen 3 chiplet. I assume there's a small failure rate with that process stage the wastes otherwise good silicon so that adds a bit of extra cost as do some of the other steps necessary for producing Zen3D.

There's also no reason to make a 3D 5600X. I doubt we don't see any products that aren't using 8-core chiplets. No one will care about higher DDR5 prices because they'll already be paying a lot for the premium high-end CPU.

If you have 3 wafers you can make around 840 cezanne dies or you can make 1314 zen3 dies and 1580 cache dies.

The most expensive cezanne SKU is $360 so 3 wafers gets you at most $302,400.

3 wafers of 5800X3D at current 5800X MSRP gets you $591,300.

Further 2 5600X3Ds would net $600 revenue vs $550 for a single 5900X3D.*

Do you really think that it costs AMD $220 extra per chip for the IO die + stacking vs Cezanne?

Edit to add: *obviously I am assuming here AMD lower existing SKU Msrps and use the current ones for the new Z3D skus but if performance is there the 3d skus could have higher pricing.
 
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Mopetar

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AMD already makes more from Zen chiplets without stacked cache added on. They're obviously making a certain amount of APUs to sell to Dell, HP, and other such companies. The argument for maximizing revenue is already there without v-cache. The argument is even greater for why AMD shouldn't make Radeon dies, but we're still getting some of those.

It's also a matter of production capacity. How many dies can TSMC process per day? There's more bottlenecks to a Zen3D that don't exist for other products so even if you were better off financially if every wafer went to Zen3D that may not actually be possible.

Even if it were you don't waste any chiplets on a $300 5600X when you can put them in server products that make several times the revenue. You might make a single high-end desktop part to act as a Halo product, but if your argument is that AMD can maximize money over APUs by making a Zen3D 5600X, that same argument says they shouldn't because there's even more money in making an Epyc CPU instead.
 

Joe NYC

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It's also a matter of production capacity. How many dies can TSMC process per day? There's more bottlenecks to a Zen3D that don't exist for other products so even if you were better off financially if every wafer went to Zen3D that may not actually be possible.

That is actually wrong. The biggest bottleneck right now is substrate. Intel said they used up a lot of their reserves in Q2, and they don't worry about losing any market share in Q3 because the substrate is so depleted that in Q3, their competitor (AMD) is not going to face identical constraint, unable to increase production.

So this is actually perfect time to add V-Cache, to avoid the real bottleneck, which is substrate as of now. Adding V-Cache makes the product more valuable without using any additional substrate.
 

Timorous

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AMD already makes more from Zen chiplets without stacked cache added on. They're obviously making a certain amount of APUs to sell to Dell, HP, and other such companies. The argument for maximizing revenue is already there without v-cache. The argument is even greater for why AMD shouldn't make Radeon dies, but we're still getting some of those.

It's also a matter of production capacity. How many dies can TSMC process per day? There's more bottlenecks to a Zen3D that don't exist for other products so even if you were better off financially if every wafer went to Zen3D that may not actually be possible.

Even if it were you don't waste any chiplets on a $300 5600X when you can put them in server products that make several times the revenue. You might make a single high-end desktop part to act as a Halo product, but if your argument is that AMD can maximize money over APUs by making a Zen3D 5600X, that same argument says they shouldn't because there's even more money in making an Epyc CPU instead.

Not all 6c parts will bin to EPYC or 5900X standards. If there are enough then you can chuck them or you can sell them.
 
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moinmoin

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The biggest bottleneck right now is substrate. Intel said they used up a lot of their reserves in Q2, and they don't worry about losing any market share in Q3 because the substrate is so depleted that in Q3, their competitor (AMD) is not going to face identical constraint, unable to increase production.
AMD actually has been talking about this very topic for quite some time, proactively investing in expansion of substrate production. An analyst's take from yesterday:
"we believe AMD is particularly well-positioned from a supply perspective given its strong track record, robust design win pipeline, and proactive supply chain management (e.g. co-investments in ABF substrate capacity)."