Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Kepler_L2]

If my understanding of Genoa is correct, we have the following:

The I/O die is now on N6 and uses notably less energy, even with 50% more memory channels, higher operating speeds to support them, in addition to 50% more Ser/Des links.

The CCDs have moved to N5 (with AMD customizations) and consume less power per transistor at the same clock speeds while having modestly more transistors in the core and double the L2.

This leads me to believe that:

For comparable products, say a 64 core Genoa part compared to a 64 core Milan part, there should be notable power headroom for significantly higher clocks all around for Genoa, assuming that thermals are managed.

For different products, say the 96 core Genoa vs. The 64 core Milan, the Genoa may have a slight base clock regression per core when running heavy AVX512 code, but should have roughly comparable clocks to the Milan part on "generic x86 code" but will still have substantially more total throughput due to having more cores and the memory bandwidth to support it.

In most cases, we should expect that Genoa should allow for higher sparse single core boost clocks largely due to the process improvement.

Any of this too far off?

IOD power is the same as Zen2/3.

 

[nicalandia]

If my understanding of Genoa is correct, we have the following:

The I/O die is now on N6 and uses notably less energy, even with 50% more memory channels, higher operating speeds to support them, in addition to 50% more Ser/Des links.

The CCDs have moved to N5 (with AMD customizations) and consume less power per transistor at the same clock speeds while having modestly more transistors in the core and double the L2.

This leads me to believe that:

For comparable products, say a 64 core Genoa part compared to a 64 core Milan part, there should be notable power headroom for significantly higher clocks all around for Genoa, assuming that thermals are managed.

For different products, say the 96 core Genoa vs. The 64 core Milan, the Genoa may have a slight base clock regression per core when running heavy AVX512 code, but should have roughly comparable clocks to the Milan part on "generic x86 code" but will still have substantially more total throughput due to having more cores and the memory bandwidth to support it.

In most cases, we should expect that Genoa should allow for higher sparse single core boost clocks largely due to the process improvement.

Any of this too far off?

You are Way Off buddy.!

 

[BorisTheBlade82]

IOD power is the same as Zen2/3.

This is my suspicion as well. Shrinking the IOD won't save much as the wiring via IFOP will stay the same. IIRC they will now be able to turn off part of the IFOP which could save quite a bit.

 

[Hans Gruber]

I think AMD is taking all the new power efficiency gains (5nm) and dumping those back into higher core speeds 5.5ghz+ and increasing the minimum/maximum voltage to achieve those advancements. I guess we will see it when Zen 4 is released. But I would not be surprised if Zen 4 uses 1.5v+ max clocks and all cores.

A lot of people are focused on IPC gain without seeing that the max boost clocks will be 5.5ghz+ plus on the top models. I have heard the 7600x will have a max boost frequency of 5.3ghz out of the box. If you consider 4.6ghz (5600x) vs. 7600x 5.3ghz. The ghz increase is 15%. That would be a 15% improvement in speed if it scaled 1:1. Even a 50% scale would be a 7.5% increase on core speed alone without factoring in the 10% IPC gain. I am using conservative numbers.

I have heard that Raptor Lake is still Alder Lake with core efficiency and power efficiency enhancements. I do not think it will matter much. Intel still can't touch AMD's power efficiency. They say Raptor Lake narrows the gap. In reality, AMD is boosting the clocks by juicing the processors which will make it seem like Raptor Lake is narrowing the power usage gap.

AMD is making up for a less than expected IPC gain with significantly increased core clock speeds. The increase in power should be offset by the 5nm process node shrink power efficiency gains.

The next interesting part will be how well Zen 4 performs with fast DDR5. If it's anything like Zen 2 and Zen 3. Fast memory could increase performance at a faster clip than Intel with ram memory speed.

 

[mikk]

I have heard that Raptor Lake is still Alder Lake with core efficiency and power efficiency enhancements. I do not think it will matter much. Intel still can't touch AMD's power efficiency. They say Raptor Lake narrows the gap. In reality, AMD is boosting the clocks by juicing the processors which will make it seem like Raptor Lake is narrowing the power usage gap.

Only 5% higher PL2 but something like 30%+ improved MT Performance, of course Raptor Lake narrows the gap. AMD needs high clocks, otherwise they will lose in performance. They have no choice really. Both have no choice actually, Intel also relies on high clock speeds. IPC wise both are close apparently and 8+16 has the same amount of threads as 16 big cores. AMD benefits from the full node advantage, power efficiency is a win therefore. The gap narrows down though.

 

[Thibsie]

IOD power is the same as Zen2/3.

No PCIe 5 then ?

 

[nicalandia]

No PCIe 5 then ?

PCIe 5 confirmed for quite some time now..

 

[Thibsie]

PCIe 5 confirmed for quite some time now..

View attachment 65054

So how could it be the same IOD ?

 

[itsmydamnation]

So how could it be the same IOD ?

 

[nicalandia]

So how could it be the same IOD ?

It's not the same. The post you quoted said "Same Power" which is different from "Physically the Same"

 

[jamescox]

It's not the same. The post you quoted said "Same Power" which is different from "Physically the Same"

Have they said that it is the same amount of power or is that speculation? It would make some sense since they added a lot of stuff but are going from 14 nm GF to 6 nm TSMC. The clock will be a lot higher, so latency could be significantly lower. It is likely a completely new design, so there may be structural reasons for lower latency rather than just higher clock. I am wondering if it will still be split into 4 NUMA nodes internally.

 

[Kepler_L2]

Have they said that it is the same amount of power or is that speculation? It would make some sense since they added a lot of stuff but are going from 14 nm GF to 6 nm TSMC. The clock will be a lot higher, so latency could be significantly lower. It is likely a completely new design, so there may be structural reasons for lower latency rather than just higher clock. I am wondering if it will still be split into 4 NUMA nodes internally.

The Gigabyte leak from last year showed IOD power.

 

[HurleyBird]

The Gigabyte leak from last year showed IOD power.

The IODs are not drawing static amount of power. Behavior between the two IODs will be markedly different. I'll be surprised if the Zen 4 IOD doesn't significantly improve idle consumption.

 

[tomatosummit]

The IODs are not drawing static amount of power. Behavior between the two IODs will be markedly different. I'll be surprised if the Zen 4 IOD doesn't significantly improve idle consumption.

Idle consumption isn't what's going to be factored into the cpu's tdp.
It will count the IO die going full tilt with the cores at full load to calculate the base clocks.
Hopefully the idle consumption can drop a lot, shown with the N6 modules in rembrandt having decent power which should in theory give it a healthy boost range but on a platform where the IO is in use it's another picture.
I haven't found the pcie5 power per bit improvement anywhere but samsung states ddr5 is only 30% more efficient than ddr4 that is more than negated with improved speeds and 50% more channels.
It's a silly situation where the more power the IO die can draw, the more efficient the cores are from the information we have.

samsung's ddr5 page;

DDR5 | DRAM | Specs & Features | Samsung Semiconductor Global

Samsung's DDR5 opens new possibilities for life experience. It delivers fast speed up to 7,200Mbps, capacities ranging from 16Gb to 32Gb.

semiconductor.samsung.com

 

[Thibsie]

/Facepalm

To much water I guess lol

 

[Henry swagger]

https://twitter.com/x/status/1551697914921099264

Gigabyte leak was accurate... amd must be pushing the power limits up on many sku's to hit above 5ghz all core 🤔

 

[Bigos]

Where in that leak is there information which SKU would use which TDP configuration? That is pure speculation.

 

[Markfw]

https://twitter.com/x/status/1551697914921099264

Gigabyte leak was accurate... amd must be pushing the power limits up on many sku's to hit above 5ghz all core 🤔

In the first place its a leak. In the second place, not once single one of those uses as much as the 12900k and has more cores. Save your anti-amd comments until they are released.

 

[Thibsie]

In the first place its a leak. In the second place, not once single one of those uses as much as the 12900k and has more cores. Save your anti-amd comments until they are released.

No, please. We might want NOT to get those even when Zen4 is released. Thank you 😊

 

[pakotlar]

In the first place its a leak. In the second place, not once single one of those uses as much as the 12900k and has more cores. Save your anti-amd comments until they are released.

I knew youd be upset

170 TDP is 45W higher than 12900K TDP and socket at 230W is 11W-20W lower than 12900K/13900K PL2. We’ll likely see cases where one or the other draws more power, but on average 7950X should be more frugal, anything else would be very surprising.

 

[gdansk]

I know some people here think they won't use 230W PPT out of the gate. But why wouldn't they? They don't need to save it for 24/32 core CPUs. Whenever those show up they will be way more efficient regardless because of the lower frequency/voltage. Zen 4 was designed for Genoa, after all.

 

[Timmah!]

I know some people here think they won't use 230W PPT out of the gate. But why wouldn't they? They don't need to save it for 24/32 core CPUs. Whenever those show up they will be way more efficient regardless because of the lower frequency/voltage. Zen 4 was designed for Genoa, after all.

I am still disappointed with the lack of 24core. If at least, when it comes eventually, next year or so, replaced 16core at that pricepoint. But you just know they simply introduce it as another higher tier. I would be massively surprised if it wont play out that way.

 

[lobz]

It comes from this...
View attachment 65002

That's for the process node. Or do you know for a fact the exact number of transistors that the flagship Genoa will have? If so, please share!

 

[lobz]

Raphael is already bringing with it higher all-core clocks. Ramping up sustained clocks with a core count as high as 96c is going to come with a serious power penalty.

My thoughts exactly.

 

[lobz]

I think AMD is taking all the new power efficiency gains (5nm) and dumping those back into higher core speeds 5.5ghz+ and increasing the minimum/maximum voltage to achieve those advancements. I guess we will see it when Zen 4 is released. But I would not be surprised if Zen 4 uses 1.5v+ max clocks and all cores.

A lot of people are focused on IPC gain without seeing that the max boost clocks will be 5.5ghz+ plus on the top models. I have heard the 7600x will have a max boost frequency of 5.3ghz out of the box. If you consider 4.6ghz (5600x) vs. 7600x 5.3ghz. The ghz increase is 15%. That would be a 15% improvement in speed if it scaled 1:1. Even a 50% scale would be a 7.5% increase on core speed alone without factoring in the 10% IPC gain. I am using conservative numbers.

I have heard that Raptor Lake is still Alder Lake with core efficiency and power efficiency enhancements. I do not think it will matter much. Intel still can't touch AMD's power efficiency. They say Raptor Lake narrows the gap. In reality, AMD is boosting the clocks by juicing the processors which will make it seem like Raptor Lake is narrowing the power usage gap.

AMD is making up for a less than expected IPC gain with significantly increased core clock speeds. The increase in power should be offset by the 5nm process node shrink power efficiency gains.

The next interesting part will be how well Zen 4 performs with fast DDR5. If it's anything like Zen 2 and Zen 3. Fast memory could increase performance at a faster clip than Intel with ram memory speed.

you always crack me up 🤣🤣🤣🤣🤣