Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

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Vattila

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Oct 22, 2004
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Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

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What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts! :)
 
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DrMrLordX

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Apr 27, 2000
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We have no idea what 'small quantities' mean.

We also don't know what "production" means in this context. Diffusing dice? That's been going on for awhile, since Genoa is . . . well, you know. But packaging/testing? That's a whole 'nother ball game. If AMD already has a few thousand or more Raphaels packaged; tested; and ready to go in May 2022, then they're just waltzing into the September launch at a relaxed pace.

Supply chain issues have been largely cleaned up.

Not really the thread for that, but shipping out of Shanghai is crippled right now.
 

moinmoin

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Jun 1, 2017
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Genoa is already being shipped to first customers. Depending on whether chiplets are still being shared between Epyc and Ryzen chips Raphael chips already being in production is not that farfetched.
 

deasd

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Dec 31, 2013
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Notebookcheck, Tweaktown regarding to MLID's video about Zen4


The OpenBenchmarking database entries show an 8-core Ryzen 7000X model that can boost to 5.21 GHz, while MLID reports 28-37% Zen 4 single-core performance increase with even higher multi-thread gains over existing Zen 3 models.




Now, the IPC performance improvements are what we're all here for... with Tom saying his sources think we'll see a large 15-24% improvement in IPC over Zen 3. CPU clock speeds will be 8-14% higher (sustained boost) with Tom adding that he's "directly told a lot of the more wild IPC claims are likely overestimating IPC and underestimating clockspeeds".
 
May 17, 2020
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From videocardz : https://videocardz.com/newz/amd-zen...n3-updated-ryzen-7000-launch-schedule-emerges

Rumored AMD Zen4 launch schedule

  • EPYC Genoa 7004 (~Q4 2022) – A0 Silicon Taped-Out in March, B0 testing is ongoing
  • Ryzen 7000 ‘Raphael (~2H 2022) – Samples already running, production soon
  • Ryzen 7000U Dragon Range (~Q1 2023) – Sampling expected this year
  • Ryzen 7000H Phoenix (~Q1 2023) – Behind Genoa in testing
  • Threadripper 7000 Storm Peak (~1H 2023) – Planned
  • EPYC Genoa-X 7004 - Production expected to be started in late Q3 2023
There will be ZEN 4 SP6 with 32C ZEN4/ 64c ZEN4c in same time that Bergamo and it's the first time that Turin appears on leaked AMD roadmap (it's stated to be for both SP5 and SP6 sockets) : https://videocardz.com/newz/amd-epy...support-a-new-sp6-socket-genoa-x-also-planned

Instinct MI300 will be an APU too with ZEN4 cores, so the socket SH5 previously leaked could be for that : https://videocardz.com/newz/amd-ins...tion-exascale-apu-with-zen4-cpu-and-cdna3-gpu
 

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SteinFG

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Dec 29, 2021
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Someone found socket SP6 and it seems like an LGA socket, the primary source is a bilibili post, but it was deleted, and I only found a copy on some random repost. Don't know how true all of this, but here's the text:

In the AMD documentation, I found some reference pictures about "AMD Socket SP6", and also found some unannounced AMD EPYC processor specific information (not to be disclosed).

This document defines the requirements for a 4844-position, 0.94 mm × 0.81 mm interstitial pitch, surface-mount land-grid array (SM-LGA) socket—herein referred to as the Socket SP6—for use with the AMD 4844-position organic land grid array (OLGA) package that has substrate dimensions of 58.5 mm × 75.4 mm. The Socket SP6, shown in Figure 1, is designed to provide a reliable electrical interconnect between the printed circuit board (PCB) and the 4844 land pads of the OLGA package throughout the life of the product.

Screenshot_20220513_181704_1.jpgScreenshot_20220513_181659_1.jpg
 
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SteinFG

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Dec 29, 2021
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looking at SP6 and SP3, they are almost identical, AMD is probably reusing the form factor for compatibility and it works good enough. Pin count is increased from 4064 to 4844. That's a little weird, considering that SP6 is supposed to be lower-end version with only 32 Zen4 cores or 64 Zen4c (according to Adored).
Безымянный22222.png

edit: with its form factor and 6ch memory, looks like it'll go perfectly into fb/meta's yosemite platform https://www.servethehome.com/facebook-meta-amd-epyc-north-dome-cpu-and-platform-details/
 
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jamescox

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Nov 11, 2009
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looking at SP6 and SP3, they are almost identical, AMD is probably reusing the form factor for compatibility and it works good enough. Pin count is increased from 4064 to 4844. That's a little weird, considering that SP6 is supposed to be lower-end version with only 32 Zen4 cores or 64 Zen4c (according to Adored).
View attachment 61435

edit: with its form factor and 6ch memory, looks like it'll go perfectly into fb/meta's yosemite platform https://www.servethehome.com/facebook-meta-amd-epyc-north-dome-cpu-and-platform-details/
The full Epyc SP5 is LGA6096, so this seems large for a half sized socket. It is 4094 for SP3 with 8 channel DDR4 and 128 pci-express. Does 4844 make sense with 6x64 DDR5 (really 12x32) memory channels and only 64 pci express?

If this is Threadripper and workstation though, they might be really pushing the power consumption. A lot of extra power and ground might be required, especially if it might have an on package gpu.
 
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jamescox

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Nov 11, 2009
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From videocardz : https://videocardz.com/newz/amd-zen...n3-updated-ryzen-7000-launch-schedule-emerges

Rumored AMD Zen4 launch schedule

  • EPYC Genoa 7004 (~Q4 2022) – A0 Silicon Taped-Out in March, B0 testing is ongoing
  • Ryzen 7000 ‘Raphael (~2H 2022) – Samples already running, production soon
  • Ryzen 7000U Dragon Range (~Q1 2023) – Sampling expected this year
  • Ryzen 7000H Phoenix (~Q1 2023) – Behind Genoa in testing
  • Threadripper 7000 Storm Peak (~1H 2023) – Planned
  • EPYC Genoa-X 7004 - Production expected to be started in late Q3 2023
There will be ZEN 4 SP6 with 32C ZEN4/ 64c ZEN4c in same time that Bergamo and it's the first time that Turin appears on leaked AMD roadmap (it's stated to be for both SP5 and SP6 sockets) : https://videocardz.com/newz/amd-epy...support-a-new-sp6-socket-genoa-x-also-planned

Instinct MI300 will be an APU too with ZEN4 cores, so the socket SH5 previously leaked could be for that : https://videocardz.com/newz/amd-ins...tion-exascale-apu-with-zen4-cpu-and-cdna3-gpu
Their rumored gpu designs look like 2 base die with 2 compute die stacked on top and 2 stacks of HBM possibly all connected together with EFB (between two base die and HBM also) to form one unit. If multiple of those are connected together by serdes IFOP type connections, then it might be really easy to just connect one of these to an Epyc IO die (up to 6 IFOP on each side). I was hoping that Bergamo would be a stacked device using the same base die or whatever the infinity cache chips are for GPUs, but we may have to wait for Zen 5 for such a thing, unless the GPUs us EFB between multiple such units.
 

jamescox

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Nov 11, 2009
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Wrong, memory is slow, higher IPC generally needs less bandwidth per core the fewer times you hit DDR the higher IPC you will have. So bigger /better caching, prefetch, prediction, decode etc.
That seems kind of backwards. If an application isn’t bandwidth limited, then it likely has a smaller average resident set size such that it is already mostly running from cache. If an application is mostly bandwidth limited, then larger cache doesn’t help much. IPC is not a constant. It varies continuously even in a single application. If the processor is achieving more instructions per clock, then that will generally mean more bandwidth required, but if it wasn’t limited by bandwidth in the first place, then it will have little effect.
 
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Markfw

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May 16, 2002
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looking at SP6 and SP3, they are almost identical, AMD is probably reusing the form factor for compatibility and it works good enough. Pin count is increased from 4064 to 4844. That's a little weird, considering that SP6 is supposed to be lower-end version with only 32 Zen4 cores or 64 Zen4c (according to Adored).
View attachment 61435

edit: with its form factor and 6ch memory, looks like it'll go perfectly into fb/meta's yosemite platform https://www.servethehome.com/facebook-meta-amd-epyc-north-dome-cpu-and-platform-details/
Actually, its very smart IMO. The SP3 socket is almost foolproof, with the carrier that aligns the CPU with the socket. Unless you are not used to it, its almost impossible to mess up the pins. And I don't know about retail EPYC, but I started with 7 threadrippers, and they all came with a torque wrench to precisely get the CPU loaded in the socket. I screwed one up, and have done about 15 since, including EPYC, that I used the threadripper wrench on.
 
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Timmah!

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Jul 24, 2010
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so 7950x 24-core after all? Color me interested, if true. Moreso than in Raptor Lake. Only that rumored 24-core SPR with higher number of PCI-E and 4-channel memory would be intriguing, well, assuming similar pricepoints.
 
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eek2121

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Aug 2, 2005
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so 7950x 24-core after all? Color me interested, if true. Moreso than in Raptor Lake. Only that rumored 24-core SPR with higher number of PCI-E and 4-channel memory would be intriguing, well, assuming similar pricepoints.

Given the sources, I would take the rumor with a healthy amount of skepticism.

However, yes, a 24 core desktop chip would be an insta-buy for me provided my workloads benefit and none regress.
 

Markfw

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Well, about the 24 core...IF TRUE (which I think it may very well be) In the Pentathlon currently going on, in one project that is CPU specific, I only have about 785 threads going, and only about half of those on this one project, but I am outputting more than the number one use of all time on this project. 2 5950x's are equal in output to a 7742 64 core, due to their high speed and IPC. I have 4 of them, and a 3950x and a 7452 EPYC (32c/64t) and 3 7742's doing this. I would LOVE to replace them with 24 core boxes.

On the current chart , for the day, up till now, the number one user has 3,170,667 and I have 3,446,000 points.
 
Jul 27, 2020
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2 5950x's are equal in output to a 7742 64 core, due to their high speed and IPC.
:eek:

It's also coz using 128 threads needs very, very optimized software. Five years down the line, we might see more and more software start to support 128 threads. Windows 11 may even have its max thread count get upgraded to 128.
 

Markfw

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:eek:

It's also coz using 128 threads needs very, very optimized software. Five years down the line, we might see more and more software start to support 128 threads. Windows 11 may even have its max thread count get upgraded to 128.
each thread is one task, so multi-threading is not the issue here. And all of these computers (except the one hosting boinctasks) is running linux, which has no problem with even 256 threads.
1652643295168.png
 

Timmah!

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Given the sources, I would take the rumor with a healthy amount of skepticism.

However, yes, a 24 core desktop chip would be an insta-buy for me provided my workloads benefit and none regress.

I think it might depend on the date of release of Raptor Lake? When is that supposed to be again? 16C 7950x might not cut it against 8+16 13900k, if they happen to compete.
Anyway its funny proposition that i might be hypothetically upgrading from intel 7940x to amd 7950x :)
 

tomatosummit

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Mar 21, 2019
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I'm not that convinced that a 16c Z4 will have problems against RL. Z4 is the bigger jump after all, and they're both 32t.
It's a much better marketing win. RL can claim 24cores and oems can put that in big shiney letters on the front of products.
16cores might win for zen4 but 24cores will grind rl into dust and serve as competition to fishhawk falls (24core golden cove !hedt) while being able to release multiple quarters before it.