Have they said anything about the new IO die? Triple channel memory seems an unlikely design choice.
If they just sliced the Genoa IOD into 4 quadrants it is possible, each quadrant of the Genoa IOD has 3 UMCs.
For instance, that was what they did with Vermeer IOD, it is a quadrant of the Milan IOD
2x CCDs are connected to one switch attached to 2x UMCs, for closest hop. There is a repeaters from the switch to the next introducing additional hops.
This is how the SRAT table is being calculated
Genoa will have 3x CCDs connected to one switch attached to 3x UMCs.
But of course it is just a possibility, and they might not reuse a portion of the IOD from Genoa at all like they did with Milan/Rome.
It does not mean that they will use 3x UMCs but just that they are there for use if they so desire.