Discussion Speculation: Zen 4 (EPYC 4 "Genoa", Ryzen 7000, etc.)

[Vattila]

Except for the details about the improvements in the microarchitecture, we now know pretty well what to expect with Zen 3.

The leaked presentation by AMD Senior Manager Martin Hilgeman shows that EPYC 3 "Milan" will, as promised and expected, reuse the current platform (SP3), and the system architecture and packaging looks to be the same, with the same 9-die chiplet design and the same maximum core and thread-count (no SMT-4, contrary to rumour). The biggest change revealed so far is the enlargement of the compute complex from 4 cores to 8 cores, all sharing a larger L3 cache ("32+ MB", likely to double to 64 MB, I think).

Hilgeman's slides did also show that EPYC 4 "Genoa" is in the definition phase (or was at the time of the presentation in September, at least), and will come with a new platform (SP5), with new memory support (likely DDR5).

What else do you think we will see with Zen 4? PCI-Express 5 support? Increased core-count? 4-way SMT? New packaging (interposer, 2.5D, 3D)? Integrated memory on package (HBM)?

Vote in the poll and share your thoughts!

 

[Gideon]

Found a very informative talk about the future of RAM/Memory (which seems to be CXL). Posted about it in the forums memory section. But If we're really lucky we see something like this trickle over to the desktop in the AM5 timeframe.

What CXL is is explained very well on the slides. Some applications I didn't think of before seem really enticing though. For instance only having one socket for the entire client lineup (vs AM4 and TRX4)

Even if unifying HEDT and Desktop seems like a stretch, this would still be very interesting solution for APUs. Essentially you could add RX 5600 XT levels of bandwidth to your CPU with minimal cost vs that many memory channels.

Now obviously it's based on PCIe 5.0, so won't be that Quick to enter mid-range Desktop market (guaranteed to be server first). But as with Pcie 4.0 and AM4, I can still imagine it arriving during the AM5 timeframe (3-4 years).

 

[eek2121]

Found a very informative talk about the future of RAM/Memory (which seems to be CXL). Posted about it in the forums memory section. But If we're really lucky we see something like this trickle over to the desktop in the AM5 timeframe.

What CXL is is explained very well on the slides. Some applications I didn't think of before seem really enticing though. For instance only having one socket for the entire client lineup (vs AM4 and TRX4)

Even if unifying HEDT and Desktop seems like a stretch, this would still be very interesting solution for APUs. Essentially you could add RX 5600 XT levels of bandwidth to your CPU with minimal cost vs that many memory channels.

Now obviously it's based on PCIe 5.0, so won't be that Quick to enter mid-range Desktop market (guaranteed to be server first). But as with Pcie 4.0 and AM4, I can still imagine it arriving during the AM5 timeframe (3-4 years).

I will believe it when I see it. I don’t know anything about CXL admittedly, and I could get into a squabble regarding the technical details (high latency, serial transactions vs. low latency parallel transactions), but at the end of the day, any new memory interface will require increased and/or different pin counts. Note that changing the max supported PCIE lanes also results in a pin count change unless it is a soft limit.

 

[xilli_fiberbit]

I had already put that in ZEN3 thread by mistake. It seems that AMD is going to chiplets too for GPU, so they can be used with HBM and CPU on same socket, it's the way i understand this AMD patent seems to be for EPYC GENOA :

https://twitter.com/x/status/1290055998351130624

Some others leakers talk about NV3X GCD/MCD means probably Graphics Complex Die/Memory Complex Die of Navi 3X (Navi 31). But on the schema of the patent above it's missing the IOD die or it's hidden somewhere...

 

[soresu]

Some others leakers talk about NV3X GCD/MCD means probably Graphics Complex Die/Memory Complex Die of Navi 3X (Navi 31). But on the schema of the patent above it's missing the IOD die or it's hidden somewhere...

The IOD could be part of an active interposer?

 

[soresu]

Found a very informative talk about the future of RAM/Memory (which seems to be CXL). Posted about it in the forums memory section. But If we're really lucky we see something like this trickle over to the desktop in the AM5 timeframe.

I wonder if this will be the thing that finally puts the fork in DDRx when HMC and HBM could not.

Presumably they will make provisions for NV DIMMS (or whatever form factor CXL memory comes in), NV RAM is the future for efficiency - especially when MRAM can finally get a foothold in system memory (or to replace SRAM cache) and in high density.

Unlike DRAM which still seems to be fairly theoretical on the subject of multi layer devices last I heard, MRAM has many such designs having been researched, and I would expect 3D MRAM before 3D DRAM.

Given AMD's history with innovative memory architectures, it would not surprise me if they are planning a change to MRAM for a future uArch, just as ARM is.

 

[NostaSeronx]

Badami (Trento) might not be Zen5, but a Zen4 chip on SP3 sockets.

Starship[Die name] (Rome[EPYC]/Castle Peak[Ryzen])

to Genesis[Die name] (Milan[EPYC]/Genesis Peak[Ryzen])

to Badami[Die name] (Trento[EPYC]/???(Brown? <== Washington, Pierce one) Peak[Ryzen]) also on SP3.

Floyd (Genoa) SP5 -> Stones (???) SP5

Led Zeppelin -> Jefferson Starship -> Genesis -> James Brown?? <== SP3
Pink Floyd -> The Rolling Stones <== SP5

 

[lobz]

Badami (Trento) might not be Zen5, but a Zen4 chip on SP3 sockets.

Starship[Die name] (Rome[EPYC]/Castle Peak[Ryzen])

to Genesis[Die name] (Milan[EPYC]/Genesis Peak[Ryzen])

to Badami[Die name] (Trento[EPYC]/???(Brown? <== Washington, Pierce one) Peak[Ryzen]) also on SP3.

Floyd (Genoa) SP5 -> Stones (???) SP5

Led Zeppelin -> Jefferson Starship -> Genesis -> James Brown ?? <== SP3
Pink Floyd -> The Rolling Stones <== SP5

That's the Nosta I like to see, when I'm not horrified but having actually good laughs

 

[soresu]

Floyd (Genoa) SP5 -> Stones (???) SP5

Server Zen4 already has the codename Genoa, so what are Floyd and Stones?

 

[soresu]

Jefferson Starship

You need not add the Jefferson part, their final name was simply Starship in the 80's (We Built This City).

 

[maddie]

Server Zen4 already has the codename Genoa, so what are Floyd and Stones?

You have to be stoned to see Floyd.

 

[trexfromouterspace]

Server Zen4 already has the codename Genoa, so what are Floyd and Stones?

From my understanding, the city names like Genoa, Rome, and Milan all refer to the whole server platform.

The band names like Floyd (Pink Floyd) and Stones (Rolling Stones) are the names for the SoC itself.

I greatly prefer the band names because it allows JoJo references.

 

[soresu]

From my understanding, the city names like Genoa, Rome, and Milan all refer to the whole server platform.

The band names like Floyd (Pink Floyd) and Stones (Rolling Stones) are the names for the SoC itself.

I greatly prefer the band names because it allows JoJo references.

Using a band name like Yes would make the PR a little confusing.

 

[soresu]

You have to be stoned to see Floyd.

Stoned?

Nah, though I wouldn't listen to it on anything stronger than weed, that's for sure - the music itself is fairly trippy even without narcotics.

 

[trexfromouterspace]

Using a band name like Yes would make the PR a little confusing.

Which is irrelevant when you consider the addition of JoJo references.

 

[soresu]

JoJo references

?

 

[NostaSeronx]

Family 19h Models 30h and Greater must be 5nm and Zen4 do to the structure of how models work in a given family.

Badami => Family 19h Models 30h-3Fh
Rembrandt => Family 19h Models 40h-4Fh
Cezanne => Family 19h Models 50h-5Fh

An APU that follows another APU immediately is a smaller APU:
Fam 15h 60h-6Fh = Carrizo/Bristol
Fam 15h 70h-7Fh = Stoney
Fam 17h 10h-1Fh = Raven/Picasso
Fam 17h 20h-2Fh = Raven2/Dali/Pollock
Fam 17h 80h-8Fh = Arden, System: Xbox Series X
Fam 17h 90h-9Fh = Lockhart/Van Gogh/Mero, System: Xbox Series S

Thus, Fam 19h 40h-4Fh is a big APU and Fam 19h 50h-5Fh is a smaller APU. Rembrandt succeeding Cezanne is a joke, they are in same generation.

Any roadmaps should be questioned if Cezanne is Zen3 and 7nm, when based on its location in the models is Zen4 and 5nm.

Only case of them being Zen3 is if it is like the Zeus N2:
N2 on 7nm = 2020
N2 on 5nm = 2020
Zen3 on 7nm = Genesis(00h-0Fh), Stones(10h-1Fh), Vermeer(20h-2Fh), No APU => Only reason to keep it off 17h is that they hit their limit. While A0h-FFh are usable they probably don't want to use them.
Zen3 on 5nm = Badami(30h-3Fh), guesswork pattern: Raphael (60h-6Fh), not guesses: Rembrandt(40h-4Fh), Cezanne(50h-5Fh)
Zen2 Ryzen CPUs = 70h-7Fh, Zen2 Ryzen APUs = 60h-6Fh // With Starship being 30h-3Fh in 17h.

Starship 17h 30h-3Fh -> Renoir/Lucienne 17h 60h-6Fh -> Matisse 17h 70h-7Fh (Starship CCD)
Badami 19h 30h-3Fh -> Rembrandt/Cezanne 19h 40h-5Fh -> Raphael 19h 60h-6Fh (Badami CCD)

AM4 only needs a revision to support DDR5. They aren't afraid to use pluses. Instead, I have been getting signs of AM6(CPU tile Primary+GPU tile Secondary) and FM5(Monolithic APU Exclusive). AM5 being a budget single 64-bit+ECC memory channel socket like AM1 for post-Pollock designs: all American painters.

?

Popular anime/manga series, Stands that are introduced a bit later are reference to bands. Actually, there is a lot: https://jojo.fandom.com/wiki/List_of_cultural_references_in_JoJo's_Bizarre_Adventure

 

[jamescox]

The IOD could be part of an active interposer?

I would expect an active interposer. The slide that has a partial image of Raphael appears to show Zen something and Navi something. I suspect Raphael and Genoa are interposer based, so it may have a Navi chiplet with HBM included. Genoa seems like it needs to be on an interposer. Having PCI-e5 speeds for the IFOP links would probably consume too much power. Connecting through the interposer will allow super wide links for the cpus which will be much lower power than trying to run serdes at ridiculously high clock speeds.

 

[jamescox]

I will believe it when I see it. I don’t know anything about CXL admittedly, and I could get into a squabble regarding the technical details (high latency, serial transactions vs. low latency parallel transactions), but at the end of the day, any new memory interface will require increased and/or different pin counts. Note that changing the max supported PCIE lanes also results in a pin count change unless it is a soft limit.

A lot of memory accesses already go over such links with AMD infinity fabric and Intel QPI. For NUMA machines, any non-local access will go over such links. Everything is moving towards using pci express-like physical layers since it allows for higher bandwidth and lower pin counts than parallel interfaces. Pci-e 5.0 will be 32 GT/s. That will actually be relativley low latency just due to the ridiculously high clock. Systems can still have DDR5 or other memory attached, but many system may just have a lot of stacked memory (HBM or other) in the package, so the external memory latency may be less important.

 

[Thunder 57]

Badami (Trento) might not be Zen5, but a Zen4 chip on SP3 sockets.

Starship[Die name] (Rome[EPYC]/Castle Peak[Ryzen])

to Genesis[Die name] (Milan[EPYC]/Genesis Peak[Ryzen])

to Badami[Die name] (Trento[EPYC]/???(Brown? <== Washington, Pierce one) Peak[Ryzen]) also on SP3.

Floyd (Genoa) SP5 -> Stones (???) SP5

Led Zeppelin -> Jefferson Starship -> Genesis -> James Brown?? <== SP3
Pink Floyd -> The Rolling Stones <== SP5

I have no idea where you pull this stuff from.

You have to be stoned to see Floyd.

Nah, one of my friends who's never used drugs and myself can enjoy Pink Floyd. The real question is, what album was the best?

 

[eek2121]

A lot of memory accesses already go over such links with AMD infinity fabric and Intel QPI. For NUMA machines, any non-local access will go over such links. Everything is moving towards using pci express-like physical layers since it allows for higher bandwidth and lower pin counts than parallel interfaces. Pci-e 5.0 will be 32 GT/s. That will actually be relativley low latency just due to the ridiculously high clock. Systems can still have DDR5 or other memory attached, but many system may just have a lot of stacked memory (HBM or other) in the package, so the external memory latency may be less important.

From what I have gathered since digging into the subject, CXL won’t replace DDR. It will become another tier of memory. The slides I have seen recently also appear to confirm this. AMD does apparently have plans for CXL for Epyc (but not for Ryzen).

 

[Markfw]

I have no idea where you pull this stuff from.



Nah, one of my friends who's never used drugs and myself can enjoy Pink Floyd. The real question is, what album was the best?

Dark side of the moon. Is that the album name ? I think so.

 

[uzzi38]

Oh, I hadn't seen this post until now.

Badami (Trento) might not be Zen5, but a Zen4 chip on SP3 sockets.

Nah, try a different guess.

 

[Gideon]

I suspect Raphael and Genoa are interposer based, so it may have a Navi chiplet with HBM included.

Having "Navi" alone proves very little, it can also easily be a tiny IGP in the I/O die for feature parity with Intel.
As Raphael is a Vermeer's successor (after Warhol), there is no change in hell that every desktop-CPU will have HBM on board. If there's no HBM, the interposer also seems kinda wasteful. Not saying that it might not have SKUs with it, but I can't imagine using it for every single CPU form a 3300X's successor and up.

 

[Thibsie]

Yep for me too although Animals is excellent too IMO

 

[Thunder 57]

Dark side of the moon. Is that the album name ? I think so.

I would agree. "The Wall" has some great stuff but also some crap. "Wish You Were Here" is pretty great too. I think a lot of people miss out on pre "Dark Side of the Moon" stuff though. Syd had some good ones before he want crazy.

Echos is excellent.
Let There Be More Light, the intro sounds like Doom music lol
Remember a Day, good stuff
Bike is fun
See Emily Play, great stuff.

I'd list a few more but I don't want to go off topic.