35 to 40% seems like it is relatively good given the circumstances. Perhaps I am missing something. An AMD cpu chiplet may be relatively similar to a mobile SoC. Mobile SoCs have very little IO and an AMD cpu chiplet only has a single infinity fabric link (32-bit serdes?). Mobile SoCs usually have a gpu though, which is a bit more logic heavy than a cpu. Mobile SoC caches are generally quite small. I would expect an AMD cpu chiplet to have possibly lower amount of IO but a significantly higher memory to logic ratio. That may allow it to beat the average scaling for a mobile SoC.Unfortunately, they provide professional services only. What is given there is only a teaser. If you think semiaccurate's 1K/year is too much ....
But that is expected if you want real data for your competitive business analysis.
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@kokhua probably buys a bunch of these papers.Samsung Exynos 990 2nd Generation 7LPP FinFET aCMOS Essentialswww.techinsights.com
It is best case scenario. Even TSMC itself says 35-40%
TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry's highest density transistors with a high-mobility channel and highest-density SRAM cells.fuse.wikichip.org