Infinity Fabric has nothing to do with an interconnect going through substrate. Infinity Fabric can technically go through anything or stay within the same die (as it does in APUs).Grace Hopper is like Infinity Fabric in that the interconnect is through substrate, no?
A100 and CDNA2 are different markets with some overlap. Former is all about AI (low precision flops) while the later is all about HPC (high precision tflops). Most A100 sales are not coming from HPC.From own AMD financial number, their CDNA sales is insignificant compared to A100 (not even 10%). So no, except the exascale government deals and one EU supercomputer, AMD GPUs have zero presence in HPC (yet). CDNA3 may change it tho
-You've seen Doom '92 running on a tractor, an excell spreadsheet, even a pregnancy test. But have you ever seen Doom '92 running on AN RX7950 PEOPLE *crowd goes totally nuts, curtains close*Hopefully more than just "this is X running on a RDNA3 GPU look how smooth it runs".
isn't this 13 chiplet talk just the stacked cache? 1 gcd + 6 mcd + 6 stacked cache chips. Å says the stacked cache is optional, after all.K so where the eff is the rumor mill now.
Navi 33 monolithic.
Navi 32/31 Chiplets with 7 total dies? (1+6)
Navi 32 with 9 Chiplets later? (1+8)
Navi 31 with 13 Chiplets later? (1+12)
God these card announcements cannot come soon enough.
From various leaks, MCD should be on N6, and stacked cache should also be on N6.isn't this 13 chiplet talk just the stacked cache? 1 gcd + 6 mcd + 6 stacked cache chips. Å says the stacked cache is optional, after all.
Can TSMC stack N5 on N6? I think that may mesh up
Yellow carp's cache info cannot be duplicated to GC_11_0_1.
Different point to GC_11_0_1:
TCP L1 Cache size is 32
GL1 Data Cache size per SA is 256
Others looks good to me