Question Speculation: RDNA3 + CDNA2 Architectures Thread

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uzzi38

Platinum Member
Oct 16, 2019
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exquisitechar

Senior member
Apr 18, 2017
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Yes, the HW is botched. No, I don't know if we will see a "fixed" Navi31 ever coming out.
If true, that’s a shame. Given the strangeness of N31’s design, such as the over provisioned BW relative to the weak GCD, I’m not that surprised. The RT performance is underwhelming either way, but the raster performance would have been right where a lot of us expected if the clocks hadn’t been botched.
 

DisEnchantment

Golden Member
Mar 3, 2017
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I am happy we have people like greymon55, Kepler, MLID and so on because I like technology and instead of reading about war or bs politics I prefer reading about tech - I don't mind even if it is a rumor or speculation. So yeah big thanks to all of them that make my day interesting.
I hope you don't group Kepler and MLID together.
One is a narcissistic blue sky fiction, "times eighty six", creator farming clicks from the average bumpkin, the other one far from it.
 

TESKATLIPOKA

Platinum Member
May 1, 2020
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Pretty much everything I leaked in the past 6 months ended up true, including the 3GHz stuff. Again, if you don't know what happened, keep quiet.

Be. Quiet.
Don't tell me what to do or that I should be quiet. It's not my fault you had bad info, but I will acknowledge many things you said were correct, and maybe I was too critical to you, the problem is that the most important ones about performance or frequency were wrong.

Now that I think about It, It's questionable If greymon55's leak about mobile N32 will be as fast as RX6950XT is true.
Doesn't matter, greymon55 deleted his account, and we will find out later.
 

Panino Manino

Senior member
Jan 28, 2017
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RDNA3 is really shaping to be another Zen moment, but in reverse, with the reality falling far bellow expectations.
In the speech sheets everything seems just right, and yet the actual products? Is this some 5D Chess that AMD is playing? With the reference cards being cheaper and weaker on purpose and the AIB delivering the true potential? Even if so, I imagine people will get mad if they buy the references cards just to see AIB ones trouncing it in performance a few weeks later.
 

crisium

Platinum Member
Aug 19, 2001
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RDNA3 is really shaping to be another Zen moment, but in reverse, with the reality falling far bellow expectations.
In the speech sheets everything seems just right, and yet the actual products? Is this some 5D Chess that AMD is playing? With the reference cards being cheaper and weaker on purpose and the AIB delivering the true potential? Even if so, I imagine people will get mad if they buy the references cards just to see AIB ones trouncing it in performance a few weeks later.

I wasn't super impressed with what we've seen, but just because they can't match the $1600 4090 doesn't mean ruination. It's likely that the $1200 4080 will be no match for the $1000 7900XTX in rasterization. As long as the RT performance isn't too far behind? Then it's up to the consumer if $200 is worth it for better RT / worse raster.

I just wish AMD didn't force this choice - again. Intel's first gen RT performance loss almost matches Nvidia's 2nd gen. And now, launching later, AMD's 2nd gen is worse. It took dedicated hardware like Nvidia has - but if Intel can make that active decision, why can't AMD? Oh well.

Maybe it is ruination. Consumers avoid Radeon GPUs like the plague, often paying $100+ for inferior rasterization performance, or $200+ for the same. I guess with no RT improvement, this will continue. I'll be skipping this gen and hoping the next offers a 250W TDP card at 4090+ performance for my next upgrade -whether AMD or Nvidia but hopefully AMD adds more hardware for RT.
 

Saylick

Diamond Member
Sep 10, 2012
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Bondrewd over at B3D forums says it's an issue in the silicon design. Not TSMC's fault; AMD just flubbed something up, but they've already identified the issue. Ironically, he says it's analogous to R520 (if y'all remember that). Overzealous design changes on a new node and new chiplet architecture. Something had to give. Seems like it was too much scope for the resources available and a hardware flaw slipped through. It likely takes a respin to address the clock shortcomings.

 

Saylick

Diamond Member
Sep 10, 2012
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I'd like to make a comparison to AMD's Zen side, if you will, because it appears that AMD bit off more than it can chew for RDNA3.

If you recall, Zen 2 brought modest IPC gains over Zen 1, and if I'm not mistaken, the original goal was to just port the Zen 1 core but implement chiplets, which is a big task in and of itself. Just being able to bring forward some of the design changes from Zen 3 to Zen 2 was a positive surprise, but it was never the original game plan.

Meanwhile, you have RDNA 3 here, which essentially is trying to do what Zen 2 did but also shove all of Zen 3's core changes into the same iteration. It would be too much at once, but I suspect that AMD got ahead of themselves and saw a once in a lifetime opportunity to offer some serious perf/$ gains. If they were able to hit 3 GHz out of the box, they'd be able to compete with Nvidia's best in raster with 200mm2 less silicon.

It truly is a shame AMD couldn't accomplish what they set out to do. You know, it's easy for us to sit in these forums and just bemoan when Nvidia extend their lead, but the fact of the matter that silicon design is awfully difficult has always remained true. These things take years to design and validate, and there's a lot of emotional investment involved, so I'm sure our disappointment pales in comparison to that of the internal engineers at AMD.

At least we have an inkling of an idea of what RDNA 4 should be: less aggressive on the architecture, and focus on the silicon design. Work out the kinks and leverage chiplets harder. Continue to polish up the drivers and get feature parity with Nvidia on FSR.
 
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KompuKare

Golden Member
Jul 28, 2009
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Yes, the HW is botched. No, I don't know if we will see a "fixed" Navi31 ever coming out.
Wonder if what "botched" it was the use of high density libraries?

Density is all very well for bean counters, but high clocks + density is probably not easy on the first spin.

RDNA3 might be great in any APU though.
 

DisEnchantment

Golden Member
Mar 3, 2017
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Wonder if what "botched" it was the use of high density libraries?

Density is all very well for bean counters, but high clocks + density is probably not easy on the first spin.

RDNA3 might be great in any APU though.
That can't be. N33 should be not be affected in this case, but apparently it is. So it is contradictory.

Compared to CPUs where a respin is usually done in case of HW bugs, GPUs are launched if they can work around those bugs in software.
So we have NGG not functioning for 2 generations until RDNA3 where the legacy geometry got removed.

RDNA1 has a ton of bugs like 7 or 8 bugs with software work around which impacted performance a lot because of issuing dummy instructions, reordering instructions, SDMA flushes etc.
With RDNA3, N31/32/33 has some SGPR bug. While Phoenix not.
One significant known performance bug is with the export conflict related to the new OREO/ROOE. They have work arounds for it in mesa.
 
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gdansk

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Feb 8, 2011
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RDNA3 might be great in any APU though.
In an APU you won't have good RT performance regardless. With its raster performance per area it could look really good. But, as always, it depends on the clocks...

And APU will have its own Xilinx AI accelerators. So will AMD remove them from the CUs in APU products?
 

Glo.

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Apr 25, 2015
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That can't be. N33 should be not be affected in this case, but apparently it is. So it is contradictory.

Compared to CPUs where a respin is usually done in case of HW bugs, GPUs are launched if they can work around those bugs in software.
So we have NGG not functioning for 2 generations until RDNA3 where the legacy geometry got removed.

RDNA1 has a ton of bugs like 7 or 8 bugs with software work around which impacted performance a lot because of issuing dummy instructions, reordering instructions, SDMA flushes etc.
With RDNA3, N31/32/33 has some SGPR bug. While Phoenix not.
One significant known performance bug is with the export conflict related to the new OREO/ROOE. They have work arounds for it in mesa.
Phoenix doesn't have the bug?

o_O
 

Joe NYC

Golden Member
Jun 26, 2021
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And he was one of those who hyped It untill launch. High clocks and all, you can still find his predictions about ADA vs RDNA3 and other stuff he said. But you can believe him all you want, I don't care.

BTW, you put together a very good table, of what percentage of efficiency increase AMD would have to achieve in order to hit which performance target.

On the gross basis, AMD barely exceeded their stated goal of 50% efficiency increase - which is something many thought AMD would increase by greater margin.

But your table was a good guideline...
 

desrever

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Nov 6, 2021
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There definitely something wrong with clocks, just compare RDNA3 vs Zen4. Theres the fact that the leaks said that they didn't need to have MCDs with stacked cache, without the GCDs running at full performance, the cache demand is probably lessened and the cost to add extra cache is pointless. Tho I doubt it can be fixed easily because AMD is launching now. Maybe by Q3 next year they will be able to release the fixed version with double the cache. Maybe 7950XTX? then.

Also I expect a bigger GCD die at some point too. I don't think multi GCD gpus are actually going to come soon enough.
 

linkgoron

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Mar 9, 2005
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AMD wouldn't have called it 7900 if they had any ability of "fixing" the issue that exists quickly. They'd release this as a 7800. I really dislike the whole smugness of some of the so-called leakers, but I assume that something really went wrong somewhere though. The clocks are just too low.

I also don't think that AMD has anything bigger. This is what AMD has. It's not terrible, but it's not really great either. Better to beat the 4080 handily in what they can with decent perf/watt and better pricing than lose to a 4090 anyway with terrible power usage.
 
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Mopetar

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Jan 31, 2011
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If they caught it soon enough to fix it in N32/N33 or at least delay the production of those cards until they could fix it or get replacement masks, it should mean really good midrange products next year.

I guess it sucks for their high-end products, but how many of us are in the market for a $1000+ GPU? It also makes me wonder about the pricing if they do get the bugs worked out for N32 or N33, because if those are clocking a lot higher, AMD is going to have a hard time justifying the price for their own N31 cards, which partially are still appealing because of the price of the 4080.
 

KompuKare

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Jul 28, 2009
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Yes, at 300mm² the GCD seems far below what is possible, or even optimal.

The one thing is that the cost of Navi31 and Navi21 are pretty similar.
Taking Ian's video on the cost of manufacturing Zen4 7950x
and the $17k figure, I got Navi's costs as:
5nm GCD: 147 good per die, $116
6nm IOD: 1,572 per die @39 for 6.
Total: $155.
A RDNA3 part with 450mm² GCD and 8 IODs would have costs around $230 ($200 + $30) but could probably dominated any review charts.
Navi 21 was 520mm² @$10k per was around $161
AD102 is about $315
AD103 is about $159
AD104 about $114
Ampere is harder to calculate, but if Samsung's 8nm was $6k then GA102 was about $170.

EDIT:
If not hitting the performance targets is a recent thing, then rather than AMD being generous to their AIBs (only AIB can have 450W cards etc.), the AIBs might actually have over-engineered their cards for what would have been the original expectations of a Navi31 with 3GHz+ clocks and extra power requirements.
Wonder if Nvidia's AIBs don't have a similar problem as the 600W parts never materialised and 4090 is "only" 450W.