Question Speculation: RDNA2 + CDNA Architectures thread

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uzzi38

Platinum Member
Oct 16, 2019
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All die sizes are within 5mm^2. The poster here has been right on some things in the past afaik, and to his credit was the first to saying 505mm^2 for Navi21, which other people have backed up. Even still though, take the following with a pich of salt.

Navi21 - 505mm^2

Navi22 - 340mm^2

Navi23 - 240mm^2

Source is the following post: https://www.ptt.cc/bbs/PC_Shopping/M.1588075782.A.C1E.html
 

Mopetar

Diamond Member
Jan 31, 2011
8,113
6,768
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I have been telling people for months now, that we will not see Ampere GPUs this year.

Outside of about 10,000 or so lucky individuals you're certainly still correct about us not seeing Ampere this year.

So let's not forget that, an 8 oz cup is bottomless if you fill it a drop at a time.

More like a Dixie cup to be honest. I'm not even sure if that's a good fit for this metaphor. Even a thimble feels like a Big Gulp based on the stock we've had so far.
 

soresu

Diamond Member
Dec 19, 2014
3,229
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As was mentioned in another post, RDNA was AMD's "Zen" moment and RDNA2 will be AMD's Zen2 moment: better in some things, slower in others, but a general return to competitiveness.
The "Zen2 moment" as it were was at least as much to do with the economical versatility of the chiplets strategy as it was the raft of uArch enhancements to the core.

No doubt if RDNA2 indeed pulled that particular stunt off without any warning it would be a massive coup for the market when combined with the enhanced perf/watt on the same process.

Alas I doubt that this will be the case, sad though it makes me to admit it.
 

soresu

Diamond Member
Dec 19, 2014
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If AMD are broadly competitive (likely) then market share will just come down to who can produce more cards.
History has shown that he who holds the APU with a gazillion design wins has the market share bonanza to rule them all.

Knowing this it is clear why AMD have prioritised mobile/embedded markets for Renoir - we can only hope that Cezanne and Rembrandt follow suit.

Rembrandt especially for (hopefully) full RDNA2 feature parity.
 

moinmoin

Diamond Member
Jun 1, 2017
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The "Zen2 moment" as it were was at least as much to do with the economical versatility of the chiplets strategy as it was the raft of uArch enhancements to the core.

No doubt if RDNA2 indeed pulled that particular stunt off without any warning it would be a massive coup for the market when combined with the enhanced perf/watt on the same process.

Alas I doubt that this will be the case, sad though it makes me to admit it.
I just saw a MALL fly right over your head... ;)
 

Saylick

Diamond Member
Sep 10, 2012
3,531
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As was mentioned in another post, RDNA was AMD's "Zen" moment and RDNA2 will be AMD's Zen2 moment: better in some things, slower in others, but a general return to competitiveness.
Yeah, and let's hope RDNA 3 will be their Zen 3 moment but without the price hikes of Zen 3. Chiplets being introduced for RDNA 3 hopefully let's AMD achieve higher margins without actually increasing the price by all too much.
 

Olikan

Platinum Member
Sep 23, 2011
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The "Zen2 moment" as it were was at least as much to do with the economical versatility of the chiplets strategy as it was the raft of uArch enhancements to the core.
Well, it's possible that big Navi is using SOiC from TSMC, and the Infinity cache is indeed a off chip

Anyway a high end gpu with only 256 bus is kinda nuts already... there is a non-trivial economic impact of the board complexity/cost... it gets more interesting at 5nm, when SRAM shrink 30% while the memory controlers only 10%
 

moinmoin

Diamond Member
Jun 1, 2017
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Is it possible that that cache is part of Infinity Fabric?
I guess the question is whether the GPU uncore in RDNA2 is organized in a similar way as in Zen, using SCF and SDF. If yes (and the high frequencies already being reported imo points to that), MALL would naturally be part of that.
 

PhoBoChai

Member
Oct 10, 2017
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That we have heard in the past when AMD GPU was in both consoles, and still Nvidia did, with throwing enough money at developers , changed the way the PC ports ran in Windows. I would like to think now is different, but history showed that Nvidia plays their cards very well, and this time has also precedence (second generation Ray Tracing in Nvidia), so I dont think AMD can get traction in RT this generation. I just hope the developers will bother implementing both ways of doing RT

This isn't gonna change. NV sponsors the PC port, throw out RDNA2 optimizations for raster & RT, add in GameWorks or now, RTX optimizations. Viola. NV has even more money these days to do these "marketing partnership" deals with studios. But the thing is, they never get all the major games. Studios have declined to work with NV in the past, for whatever reasons.

The only good thing for AMD is that Unreal Engine 5 is very optimized for Series SX and PS5, so more indie games should run good on RDNA2.
 
  • Love
Reactions: spursindonesia
Apr 30, 2020
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Anyway a high end gpu with only 256 bus is kinda nuts already... there is a non-trivial economic impact of the board complexity/cost... it gets more interesting at 5nm, when SRAM shrink 30% while the memory controlers only 10%
Do keep in mind that 128MB of cache is a huge chunk of silicon with an accompanying massive cost. Standard SRAM uses 6 transistors per bit, so 128MB of "LLC" in a GPU would be ~6.4 Billion transistors. 6.4 Billion transistors just for the LLC, never mind any other caches that may be there. The Radeon R9 290X's Hawaii core has less transistors total than just Navi2's last level cache. That is nuts!
 

CastleBravo

Member
Dec 6, 2019
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Do keep in mind that 128MB of cache is a huge chunk of silicon with an accompanying massive cost. Standard SRAM uses 6 transistors per bit, so 128MB of "LLC" in a GPU would be ~6.4 Billion transistors. 6.4 Billion transistors just for the LLC, never mind any other caches that may be there. The Radeon R9 290X's Hawaii core has less transistors total than just Navi2's last level cache. That is nuts!

One theory I saw is that Navi21 doesn't have 128MB of cache, but instead has a large pool of shared cache that would equivalent to 128MB of non-shared cache.
 

Glo.

Diamond Member
Apr 25, 2015
5,803
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You guys realize that TSMC has been given little credit for the success of AMD products in the last few years. I think TSMC should be given much of the credit for their silicon.
Yep, it was TSMCs engineers which optimized and designed AMDs architectures for this process!

It had absolutely nothing to do with AMD! There you have it guys, final confirmation how bad AMD is!
 

Zoal

Junior Member
Oct 25, 2020
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Consoles don't need it.

PS5 35 CU with 256 bus is enough.

SX with 52 CU and 320 bus is enough.

Consoles share the memory so there is less transfers and duplication like on PC, they need less raw bandwidth, relative.
Not to mention they're trying to speed up frame processing by leveraging the low-latency SSD subsystem
 

ThatBuzzkiller

Golden Member
Nov 14, 2014
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Expect ray tracing performance to be slightly below expectations since most current games with ray tracing implementations aren't optimized to take advantage of DXR 1.1 or inline ray tracing ...

Ray tracing performance will improve as upcoming titles will start integrate this feature next year so I'm not sure if we should judge RDNA2's ray tracing performance so soon thereafter it's launch based on the current set of games ...
 

dzoni2k2

Member
Sep 30, 2009
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Expect ray tracing performance to be slightly below expectations since most current games with ray tracing implementations aren't optimized to take advantage of DXR 1.1 or inline ray tracing ...

Ray tracing performance will improve as upcoming titles will start integrate this feature next year so I'm not sure if we should judge RDNA2's ray tracing performance so soon thereafter it's launch based on the current set of games ...

Of course. Let's not forget RT ran like dogsh* on Turing at first. BF5 was literally unplayable.