Skylake-X not support AVX-512 instructions

[csbin]

Skylake-X 6C AVX2? i9-7800X@3.2G? ：http://ranker.sisoftware.net/show_r...d5e3daeadeeadbfd8fb282a4c1a499a98ffcc1f9&l=en

Multi-Media Integer 599.30Mpix/s
Multi-Media Long-int 189.23Mpix/s
Multi-Media Quad-int 2203kpix/s
Multi-Media Single-float 546.11Mpix/s
Multi-Media Double-float 326.96Mpix/s
Multi-Media Quad-float 10157kpix/s


Skylake 4C AVX2 i7-7700@3.6g： http://ranker.sisoftware.net/show_r...d5e3d5e2d1e7d2f486bb8badc8ad90a086f5c8f0&l=en

Multi-Media Integer 525.14Mpix/s
Multi-Media Long-int 190.14Mpix/s
Multi-Media Quad-int 2115kpix/s
Multi-Media Single-float 466.73Mpix/s
Multi-Media Double-float 272.81Mpix/s
Multi-Media Quad-float 10500kpix/s


Skylake-SP 56C AVX-512 Xeon Platinum 8180： http://ranker.sisoftware.net/show_r...d5e3dbe3d1e0d6f082bf8fa9cca994a482f1ccfc&l=en

Multi-Media Integer 6437.86Mpix/s
Multi-Media Long-int 2299.06Mpix/s
Multi-Media Quad-int 22385kpix/s
Multi-Media Single-float 7268.05Mpix/s
Multi-Media Double-float 4593.02Mpix/s
Multi-Media Quad-float 105285kpix/s


Broadwell-EP 44C AVX2 Xeon E5-2696 v4 ： http://ranker.sisoftware.net/show_r...d5e3d4e6d2e6d3f587ba8aacc9ac91a187f4c9f9&l=en

Multi-Media Integer 3024.58Mpix/s
Multi-Media Long-int 995.63Mpix/s
Multi-Media Quad-int 15626kpix/s
Multi-Media Single-float 3104.20Mpix/s
Multi-Media Double-float 1746.95Mpix/s
Multi-Media Quad-float 61812kpix/s

 

[Edrick]

There are many other reasons for those numbers other than what you claim.

But anything to make a headline, right?

 

[JoeRambo]

I would not rush to conclusions, Those validation platforms usually run @ 2Ghz or so (and IMC is 2Ghz or misdetected).

And even "lack of support" is subtle, as it could support AVX512 at half rate (executing them on 256bit hw), that would still allow people to develop and test on them.

EDIT: And if you click around in results browser, same system also has ~120Gops Integer results, that simply does not make much sense for 6 core running 3.5-4Ghz when Skylake is getting ~same from 4 cores?

 

[LTC8K6]

Not sure why you'd make a new thread based on that...

 

[blue11]

The results are disappointing, but not unexpected. Looks like Intel market segmentation and gimp chips yet again. AVX-512 has been rumored for quite some time to be an XCC-exclusive feature. The good news is that the partially leaked lineup in the main thread showed XCC (6000-series) options going down to as low as 14C, so perhaps there will still be affordable (less than $3000) AVX-512 options for those that need it. Unfortunately, hopes for a single system for games and work are yet again dashed by Intel.

And even "lack of support" is subtle, as it could support AVX512 at half rate (executing them on 256bit hw), that would still allow people to develop and test on them.

Running at half speed changes timings quite drastically, so the only development one could do on the gimped chips is verifying that the code doesn't crash.

 

[JoeRambo]

Running at half speed changes timings quite drastically, so the only development one could do on the gimped chips is verifying that the code doesn't crash.

There is plenty (and i'd argue more) of code that can benefit of AVX512 code, even if it is executed on 256bit hw.
Think about 2x registers, extra operations and modes in AVX512 set. There are plenty of instructions that operate on 128/256bit registers and would perform exactly the same on gimped chips.

Practical example from the past - 128bit code benefited big time on Sandy Bridge once recompiled for AVX (128bit). VEX encoded ops took away a lot of register pressure and made things easier for compiler and hw.

P.S. Not advocating market segmentation and pretty certain AMD will destroy those practices with fully enabled chips.