Skylake-EP to have FIVR

[CHADBOGA]

Answer here. 😛

Okay it sounds like people like me were reading the previous quote incorrectly.

It looks like he is saying that the FIVR is in the tablet soc's, but not in the desktop CPU's.

 

[ShintaiDK]

Answer here. 😛

:thumbsup:

Or in short without the tablet/ultramobile? segment and/or more time. FIVR would still be there on all other SKUs.

LGA2011 and up will keep FIVR.

 

[ShintaiDK]

Okay it sounds like people like me were reading the previous quote incorrectly.

It looks like he is saying that the FIVR is in the tablet soc's, but not in the desktop CPU's.

No, the problem is the tablet socs in terms of FIVR. Without the tablet socs the FIVR would be everywhere.

The LGA2011 and up got the benefit of more time, so they will keep the FIVR unlike LGA1151 etc.

 

[Idontcare]

I thought FIVR was supposed to increase energy efficiency? So why did they have to remove it for the most TDP-constrained products?

Or does it have to do with thermal density?

Having a cooler running CPU is also an efficiency improvement, and yet they removed the solder under the IHS and replaced it with a thermally degraded TIM substitute for the mainstream desktop SKUs.

Intel makes many decisions, not all of them are purely engineering driven or constrained.

 

[ehume]

Yep. No Skylake refresh, but Kabylake is a 14nm successor to Skylake and will precede 10nm Cannonlake. Nothing got cancelled, Kabylake got added and everything in the pipe after kabylake got pushed out 1 year because 10nm HOL is pretty bad.

Which HOL are you referring to?

 

[IntelUser2000]

Skylake->Kabylake->Cannonlake->icelake

Weird, how we only got 2 bridges and 2 wells, but 4 lakes. LOL

4 lakes suggest that they are all based on the same architecture.

32nm Tock-Sandy Bridge
22nm Tick-Ivy Bridge

22nm Tock-Haswell
14nm Tick-Broadwell

14nm Tock- Skylake Late 2015
14nm Tick-Kabylake Late 2016
10nm Tick-Cannonlake Late 2017
10nm Tick-Icelake Late 2018

10nm Tock-? Late 2019
7nm Tick-? Late 2020

That makes it 3 generations per process from now on. Rejoice for 3-5% improvement per year! If that can even be maintained. In a few years I reckon that 3-5% improvement will be in the U and Y chips and it'll be the "IoT" chips that gain 30-40% per gen.

 

[sxr7171]

4 lakes suggest that they are all based on the same architecture.

32nm Tock-Sandy Bridge
22nm Tick-Ivy Bridge

22nm Tock-Haswell
14nm Tick-Broadwell

14nm Tock- Skylake Late 2015
14nm Tick-Kabylake Late 2016
10nm Tick-Cannonlake Late 2017
10nm Tick-Icelake Late 2018

10nm Tock-? Late 2019
7nm Tick-? Late 2020

That makes it 3 generations per process from now on. Rejoice for 3-5% improvement per year! If that can even be maintained. In a few years I reckon that 3-5% improvement will be in the U and Y chips and it'll be the "IoT" chips that gain 30-40% per gen.

It's notable that now Ticks don't imply any die shrink. But why do you think that Icelake won't be a Tock?

 

[beginner99]

It's notable that now Ticks don't imply any die shrink. But why do you think that Icelake won't be a Tock?

I think his logic is simply based on the name. Same name, same basic uArch/Tock. eg. SandyBridge and IvyBridge, Haswell and Broadwell and now 4 chips ending with lake.

 

[IntelUser2000]

I think his logic is simply based on the name. Same name, same basic uArch/Tock. eg. SandyBridge and IvyBridge, Haswell and Broadwell and now 4 chips ending with lake.

Yes, plus,

at 10nm, Cannonlake alone might not be enough to get it into stable yields for mass production the volume that Intel needs. Even now, Intel has trouble having mass availability for Broadwell and Skylake. They say something else, but I wouldn't be surprised if it was due manufacturing difficulties as well. Logic also dictates that premium parts will be the hardest to make in volume. For example, the very high frequency enthusiast oriented K parts.

It was rumored back in 2009 that 32nm might have another iteration, but good for Intel that 32nm went pretty fantastic and they were ok even on 22nm. But now, its a reality. Moore's "Law" is going on a 36+ month cycle.

I think when they get it really stable then it'll get a tock on 10nm. It likely doesn't help being manufacturable when nowadays they have to resort to rather big changes to keep transistors useful(like TriGates).