- Oct 31, 1999
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Maybe there are a few tidbits of new info here: article
One of the things I noticed is that they haven't quite canned Yamhill after all... looks like they intend to implement the x86-64 instructions around the end of 2004 with the Nehalem core (two cores downstream of Prescott). And there is a rough idea of what the timeframe will be: Prescott ~Q3 2003, Tejas ~1H 2004 and Nehalem ~Q4 2004.
edit: actually, now that I sift through the syntax again, it sounds like Tejas is the last generation of P4, and Nehalem is the "Pentium5," if you will, not an advanced P4. Oops!
One of the things I noticed is that they haven't quite canned Yamhill after all... looks like they intend to implement the x86-64 instructions around the end of 2004 with the Nehalem core (two cores downstream of Prescott). And there is a rough idea of what the timeframe will be: Prescott ~Q3 2003, Tejas ~1H 2004 and Nehalem ~Q4 2004.
edit: actually, now that I sift through the syntax again, it sounds like Tejas is the last generation of P4, and Nehalem is the "Pentium5," if you will, not an advanced P4. Oops!
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