I thought so 
Back in the days of 440BX, we weren't nearly saturating the PCI bus. Drives had smaller caches and lower media I/O throughput, so even on an UDMA5 channel, you'd never get those 95 MB/s, and we'd hardly ever run into a situation where isochronous agents (sound, TV cards, etc) were kept off the bus for long enough to throw them out of sync.
That figure is about the maximum you get from a storage controller on standard PCI - I've seen that same ceiling on anyone's chipset, from ALi over VIA, SiS and Intel to ServerWorks, with IDE, SATA, and even the finest of SCSI controllers. There's a lot of housekeeping accesses in storage, that's where the delta to the theoretical 133 MB/s ceiling comes from.
440BX does suffer from the same balance problems as everyone else's PCI busses once you near saturation - only that it has no means of shifting the balance this or that way. VIA's do - shame that careless implementers ruined the party.
Back in the days of 440BX, we weren't nearly saturating the PCI bus. Drives had smaller caches and lower media I/O throughput, so even on an UDMA5 channel, you'd never get those 95 MB/s, and we'd hardly ever run into a situation where isochronous agents (sound, TV cards, etc) were kept off the bus for long enough to throw them out of sync.
That figure is about the maximum you get from a storage controller on standard PCI - I've seen that same ceiling on anyone's chipset, from ALi over VIA, SiS and Intel to ServerWorks, with IDE, SATA, and even the finest of SCSI controllers. There's a lot of housekeeping accesses in storage, that's where the delta to the theoretical 133 MB/s ceiling comes from.
440BX does suffer from the same balance problems as everyone else's PCI busses once you near saturation - only that it has no means of shifting the balance this or that way. VIA's do - shame that careless implementers ruined the party.