Serial versus Parrallel transmissions across distance

[MadRat]

The popular RAMBUS myth that eventually memory would have to resort to "serial" whereas today it is mostly "parrallel" seems to have lost alot of its steam. I imagine that some circumstances would need to exist for the serial pathway to be more efficient. Some basic questions come to mind that would be necessary to explain why serial transmission of data has been resisted. How wide does the parrallel bus need to be before the transmission rate of the data becomes hindered? How does the theoretical limits to the rate of transmission change as we increase and decrease the distance of the message? Do changes to the distance between transmitter and reciever change the limits to transmission rate equally for both serial and parrallel pathways?

I imagine that a wider bus has greater inherent latency for the number of pathways to recieve the cue to transmit. Likewise, I imagine that it will create more latency to verify the entire bus has completed their reception of the message. I would also imagine that the rate of transmission across a wire would grow exponentially as the distance of the transmission is lessened. Is this true? If so then It should mean that the width of the bus should decrease the latency of the total number of pathways, that is the time it takes to verify the operation, exponentially accordingly (wider bus = fewer operations over time) between transmissions each time the width of the bus is halved? Am I giving the benefit of halving the width of the bus too much credit?

I'm not going to outright imply one bus, serial or parrallel, is better in every case. I'm just asking whether certain factors such as what I mentioned, play an important role in the choice of the bus.

 

[AndyHui]

I don't think that serial has lost steam at all. Look at Serial ATA, and the new PCI Express. Both are serial formats.

The biggest problem with long distances is clock skew, when you can't guarantee that the signals on all lines will reach the destination at the same time or within the designated window. The larger number of parallel lines you have, the worse it gets. Go back to a high-speed serial format and the problem is reduced. Previously, parallel was popular because we couldn't get the signals up to high speed. Now we have the technology to do that, so we are going back to serial. Of course, at some stage, we will move back to some parallel ideas, much like how PCI Express has the ability to add up to 32 lanes to increase bandwidth.

 

[MadRat]

So basically "clock skew" is when the width of the bus affects the transfer rate?

 

[Evadman]

Originally posted by: MadRat
So basically "clock skew" is when the width of the bus affects the transfer rate?

It is when you send 32 pieces of info, but some arrives early, and some arrives late, which slows the whole process.

 

[sao123]

As the FSB data bus becomes wider and more things are attached directly to it... more bridges. There are now separate bridges for PCI, AGP, Network CSA, Disk I/O, etc. I think we will see a need to go to some sort of high speed serial memory, and even other applications.

 

[glugglug]

Memory interfaces will never be serial (well, there are the USB memory things for consumer devices, but I mean for general computing). In order to get the bandwidth of a current P4 through a serial interface would require a bus freqency of 64GHz - not happening any time soon, and by the time we are using a 64GHz frequency, the bandwidth demand will be a lot higher.

Even when using RAMBUS, the memory bus is 64 bits wide. The RIMM might be buffering and multiplexing a narrower stream than that from the chip, but the bus is still 64 bits wide (72 including parity) before it gets to the CPU.

The primary reason we see more serial technologies today has NOTHING to do with performance/bandwidth. It's all about COST REDUCTION. The devices with the highest bandwidth requirements (system RAM, video card, CPU, cache) will always have primarily parallel busses. These busses might be partially demultiplexed into smaller pieces sent at a higher frequency to reduce costs by having fewer trace lines (like hypertransport), but would never be made completely serial, meaning 1 bit wide.

Do you realize that your "parallel port" is an 8-bit data bus, which makes calling RIMMs which come only in 16-bit and wider flavors "serial" seem rather silly?

 

[Mday]

i consider parallel a glorified serial connection. the movement to serial NOW is because of higher frequency ICs being available. these serial protocols will be parallelized in future revisions.

serial would be better as andy stated, clocks are big problems with data sync, and causes lost cycles.... looks like andy ansewred your question rather fully.

another thing would be interconnect necessities.

 

[borealiss]

differential signals actually make parallel buses across long distances viable now. and as far as clockskew, that depends on the bus as well as the protocol being implemented. something like hypertransport is very viable over a good length of pcb, more so than other technologies, because of the differential signaling coupled with the packet-esque transmissions. and serial technologies usually get implemented later into larger parallel ones anyways, so the distinction is almost moot imo.

 

[Sahakiel]

The way I see it, serial technologies emerge when noise, cross-talk, and the like begin to be major problems until the silicon begins to outpace the data. Parallel technologies emerge when the data requirements outpace the silicon.

And in between, we have the almight dollar added to the mix. Always best bang for the buck or best investment for the future.

 

[NogginBoink]

Parallel will always be faster than serial.

Any serial communication mechanism you come up with, I'll put two of 'em side by side and have twice the bandwidth.

But over distances, all those cables and amplifiers and connectors get expensive. Serial transmission requires far less infrastructure. That's why we see the move toward serial, IMO.

 

[FrustratedUser]

A big problem with paralell buses are the capacitance between wires causing cross talk between them. The cap. also works as a filter basically shortcutting the signals at high frequency. On a mother board there is also the problem synchronizing the paralell signals because the signal paths are not of the same length.

These are some reasons higher speeds and lower costs are achieved with a serial interface.