- Jun 30, 2004
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There have been several reports of "stuck" core temperature sensors.
I personally have chronicled how BIOS revisions between Conroe and Penryn had programmers struggling to re-vamp BIOS code to interpret the Penryn sensors. [See the Anandtech article on the E8500 for March, 2008, with an extensive dissertation on Penryn thermal-sensoring. It even included source-code revisions for non-Intel mobo manufacturers to update their BIOS'.] There was a lag between Penryn release and BIOS revisions by non-Intel board-makers -- and that includes both nVidia AND INtel chipsets.
I had this "licked" with my Striker Extreme 680i board and its August 5, 2008, BIOS revision v.1603 -- until -- apparently -- my chipset cooling and SLI configuration was too much for the MCH/Northbridge, leaving me with one dead Striker and a hopeful RMA request.
In meantime, I just decided to acquire an eVGA 780i board, and couldn't resist the temptation to step up to the E8600 E0-stepping. I should've tried the E8400 with the board first.
The configuration shows the following anomalies. RealTemp seems to indicate that the core sensors are "stuck." Its "sensor test" notes that Intel never intended the sensors to read "Idle" temperatures. So Everest reports the cores at 56/56C, while REalTemp reports them at 46/46C.
HOWEVER . . . .
The TCASE value reported by BIOS monitor, and the "CPU" [TCASE] reported by Everest and nVidia Monitor -- show idle values which may be excessive by 5C degrees, but the spread between the idle and load temperatures is spot-on to what one would expect with my heatpipe cooler [tested extensively last year, with 8-second CoreTemp samples, bar-graphs with circles and arrows on each one -- posted on the "Cases and Cooling" forum.]
I can neither remember, nor can I seem to find on the INtel web-site, how TCASE is determined from Intel thermal sensoring. If TCASE is determined by reading the core sensors, then I'd have to conclude that the core sensors aren't really "stuck" -- and that this is a coding problem in BIOS which can be fixed through BIOS revision. If TCASE uses a different sensor than the core sensors, then, yes -- there may be something to the rumor and the "skinny" that Wolfdales and the recently issued E8600 have "stuck" sensors.
It is interesting to note -- confirmed by someone using a Q9550 core in addition to my experience with the E8600 -- that the "stuck" sensors begin to move when the load temperatures exceed the "stuck" values.
Can anyone clarify why TCASE behaves normally between idle and load, while these core sensors seem to be stuck? Is there a third sensor? I thought that TCASE was determined using the core temperature sensors, but I may be wrong.
I personally have chronicled how BIOS revisions between Conroe and Penryn had programmers struggling to re-vamp BIOS code to interpret the Penryn sensors. [See the Anandtech article on the E8500 for March, 2008, with an extensive dissertation on Penryn thermal-sensoring. It even included source-code revisions for non-Intel mobo manufacturers to update their BIOS'.] There was a lag between Penryn release and BIOS revisions by non-Intel board-makers -- and that includes both nVidia AND INtel chipsets.
I had this "licked" with my Striker Extreme 680i board and its August 5, 2008, BIOS revision v.1603 -- until -- apparently -- my chipset cooling and SLI configuration was too much for the MCH/Northbridge, leaving me with one dead Striker and a hopeful RMA request.
In meantime, I just decided to acquire an eVGA 780i board, and couldn't resist the temptation to step up to the E8600 E0-stepping. I should've tried the E8400 with the board first.
The configuration shows the following anomalies. RealTemp seems to indicate that the core sensors are "stuck." Its "sensor test" notes that Intel never intended the sensors to read "Idle" temperatures. So Everest reports the cores at 56/56C, while REalTemp reports them at 46/46C.
HOWEVER . . . .
The TCASE value reported by BIOS monitor, and the "CPU" [TCASE] reported by Everest and nVidia Monitor -- show idle values which may be excessive by 5C degrees, but the spread between the idle and load temperatures is spot-on to what one would expect with my heatpipe cooler [tested extensively last year, with 8-second CoreTemp samples, bar-graphs with circles and arrows on each one -- posted on the "Cases and Cooling" forum.]
I can neither remember, nor can I seem to find on the INtel web-site, how TCASE is determined from Intel thermal sensoring. If TCASE is determined by reading the core sensors, then I'd have to conclude that the core sensors aren't really "stuck" -- and that this is a coding problem in BIOS which can be fixed through BIOS revision. If TCASE uses a different sensor than the core sensors, then, yes -- there may be something to the rumor and the "skinny" that Wolfdales and the recently issued E8600 have "stuck" sensors.
It is interesting to note -- confirmed by someone using a Q9550 core in addition to my experience with the E8600 -- that the "stuck" sensors begin to move when the load temperatures exceed the "stuck" values.
Can anyone clarify why TCASE behaves normally between idle and load, while these core sensors seem to be stuck? Is there a third sensor? I thought that TCASE was determined using the core temperature sensors, but I may be wrong.
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