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>>> SDram Idle Timer <<<

T

THUGSROOK

Elite Member
not everyone has this option in their bios, but for those that do.....


TEST SYSTEM
P4 2.26b @ 2.82g 166fsb 333ddr
Asus P4B533 i845e (bios v1011)
Corsair XMS3000 2x 256mb Cas 2226
GF4600 @ 320x714 | det 41.80 | Win98SE


3DMARK2001SE

Infinite > > > > > > > > 13677

0T > > > > > > > > > > > > 13701

8T > > > > > > > > > > > > > > 13748

16T > > > > > > > > > > 13685

64T > > > > > > > > 13633


UT2003 DEMO 1024x768x32, botmatch

Infinite > > > > > > 69.4

0T > > > > > > > > > > > 70.0

8T > > > > > > > > > > 69.9

16T > > > > > > > > > 69.8

64T > > > > > > > > 69.7


 
What's that option do, anyway? 😕

cool test, now I've got something else to verify...
rolleye.gif
😉
 
it is a timer ~ the setting is the amount of time a "page" can reside in memory before being dumped (if its not reused)

🙂
 
yea it looks like it gets to a certain point and then it falls off quickly.
not a bad little gain tho 🙂
(default setting = infinite)
 
Definitely not bad...😉 And there's another example of 2 benchmarks liking different things...🙂
 
slightly different yea, but the trend is leaning towards the lower numbers.

this is another one of those tweaks where there is no magic number ~ you need to run your own tests.
if you needed to just take a guess id say go for 8T or 16T.
this setting does not effect system stability. (at least not in my case)

🙂
 
You're right, just like the PCI Latency testing you did...I'm curious about the difference between our two boards...🙂
 
well its not just boards ~ i would think that DDR speed and cas settings would also play a big role in what would be best.

🙂
 
hi Thugs ..

I have 3 options labeled ...

Input Delay value:

Definition: allows adjustment of data input strobe delay time of memory. Values are in HEX,,, minimum 0000 max 003F
Default is 24

and

Output Delay value:

Definition: allows adjustment of data output strobe delay time of memory. Values are in HEX,,, minimum 0000 max 00FF
Default is 40

and

DCLK Feedback Delay:
Definition: The northbridge via DCLK feedback signal to sense the DRAM clock timing of DRAM module.
Nine options ranging from 0ps to 840ps.
Default is 0

I havent messed with these ... Can you give me advice ... If I should or shouldnt experiment with values?
 
ok .. thanks for your read ... I'm sure they are memory timings... not CPU timings...

Just thought I'd ask ya since your memory savy.
 
What DDR rate was my old memory running at in my BE7-R? 144FSB, 3:4 memory timings. 2.5/2/3/7 were what I had it set at. Probably could have done more. I could never make sense of how the DDR equations were totalled. I am using the same CPU in my sig and no matter what it fails at anything above 144fsb. So my memory timings were about the only thing left to improve.
Also was that good or bad for XMS PC2400? 😕
 
np SW 😉

you might wanna checkout Mikki's BE7 thread, plenty of info on whats wrong with those boards in there.

🙂
 
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