SB-E and PCI-E Gen3?

wonderbread57

Junior Member
Oct 4, 2011
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I put a question mark in the title because I'm confused, perhaps along with a bunch of other people.

I've read several articles stating that SB-E chips are PCIe 3.0 compatible but did not pass accreditation or something like that. This could all be rumor but if you look at the pics of the new SB-E motherboards, they show just about every brand logo except forPCI-E Gen3 even though the description of the boards mentions Gen3 support.

I then read other less competent sounding articles that say that while the first batch of SB-E chips, like 3930K, may not support Gen3, the 2012 Q2 chips, like the 3940K, might support Gen3.

So, tl;dr questions
1) Does this november's SB-E chips/mobos support PCI-E 3.0 and what are the deficiencies if any in support of it?
2) Is PCI-E 3.0 something that is supported on the mobo or on the CPU?
3) If Q4/2011 chips don't support Gen3 but Q2/2012 chips do, does that mean a motherboard upgrade will be necessary to take full advantage of that support?

So many questions along with excitement for this platform
 
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alyarb

Platinum Member
Jan 25, 2009
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There is no PCI Express controller on the SNB-E die, so you could say SNB-E is compatible depending on the chipset you use with it. Like Bloomfield, SNB-E has an external interface called QPI that allows multiple CPUs to communicate with each other and with peripheral controllers. PCI Express is usually located in the QPI hub. Numerous X79 motherboards have been seen touting PCIe 3.0 at trade shows, so you would assume the QPI hub is at least somewhat compliant with the spec.
 

Edrick

Golden Member
Feb 18, 2010
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There is no PCI Express controller on the SNB-E die, so you could say SNB-E is compatible depending on the chipset you use with it. Like Bloomfield, SNB-E has an external interface called QPI that allows multiple CPUs to communicate with each other and with peripheral controllers. PCI Express is usually located in the QPI hub. Numerous X79 motherboards have been seen touting PCIe 3.0 at trade shows, so you would assume the QPI hub is at least somewhat compliant with the spec.

I am fairly confident that everything you just said is incorrect regarding X79 and SB-E.
 
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Edrick

Golden Member
Feb 18, 2010
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1) Does this november's SB-E chips/mobos support PCI-E 3.0 and what are the deficiencies if any in support of it? 2) Is PCI-E 3.0 something that is supported on the mobo or on the CPU? 3) If Q4/2011 chips don't support Gen3 but Q2/2012 chips do, does that mean a motherboard upgrade will be necessary to take full advantage of that support?

1. The MBs are going to be wired for PCIe 3.0. The SB-E CPUs will have the functionality on die, but I have read they can not get PCIe 3.0 certified due to multiple reasons, one being no hardware to test with (video cards). But if the CPU can transmit data at the 8GB/s of PCIe 3.0, I really do not care if it is certified or not. We will know for sure on Nov. 15th.

2. Both. Just like SB, SB-E will have on die PCIe controller. But will also need the MB to be compatable. I hear the first SB-E CPUs will have 40 lanes on die, as opposed to 16 on regular SB.

3. I expect no MB upgrade required. The PCIe 3.0 spec is finalized and there is no reason MB makers can not put that into MBs today. If for some reason we have to wait for IB-E for PCIe 3.0, it will be a simple CPU drop in.
 

alyarb

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Jan 25, 2009
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I am fairly confident that everything you just said is incorrect regarding X79 and SB-E.

Consider the geometric implications of what that means and you will be less than fairly confident. These dies are intended to scale to multiple socket configurations and ultrawide QPI is the desired interface for such communication. It follows in the same tradition of Gulftown and Bloomfield. Some SNB-E chips will be made available on Socket 1356, for instance, which implies there is no on-die PCI express, otherwise the number of pins would be much greater. Likewise with LGA2011 you have double the number of QPI pins and the additional memory bus. Not only does that leave no room for PCIe, but it eliminates numerous resource-sharing caveats that would arise if multiple controllers rested in every CPU rather than in the hub. Consider how much more complex the QPI routers would have to be in a 4S machine.

Sorry but if you look at the physical constraints it is far less silly to assume one way than the other. I know a lot of you like to think the server chips were laid out start to finish with gamer-enthusiasts in mind, but that's also false. It is wrong in general to make any inferences about server parts based on what is known about mainstream parts. Desktop SNB is little more than a scaled up version of the mobile platform, which is tending toward SoC configurations, which server chips would never do. Intel would never trade execution die space for peripherals in server parts.

Or are you saying intel will use a totally different set of masks for LGA1356 and LGA2011 parts? because a link for that would be good. or some kind of link to back up what you're saying. had to chuckle a little at the 40 on-die lanes.
 
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LondonBurning

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Sep 8, 2011
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1. The MBs are going to be wired for PCIe 3.0. The SB-E CPUs will have the functionality on die, but I have read they can not get PCIe 3.0 certified due to multiple reasons, one being no hardware to test with (video cards). But if the CPU can transmit data at the 8GB/s of PCIe 3.0, I really do not care if it is certified or not. We will know for sure on Nov. 15th.

2. Both. Just like SB, SB-E will have on die PCIe controller. But will also need the MB to be compatable. I hear the first SB-E CPUs will have 40 lanes on die, as opposed to 16 on regular SB.

3. I expect no MB upgrade required. The PCIe 3.0 spec is finalized and there is no reason MB makers can not put that into MBs today. If for some reason we have to wait for IB-E for PCIe 3.0, it will be a simple CPU drop in.

Quoted for truth. It looks like all the boards are touting Gen3 on their packaging and even on the boards themselves. So it's left to the CPU to take advantage of that now, but the functionality should be there.

On a side note, anyone else really disappointed with the new Asus x79 boards having active cooling? Talk about shortening the life-span when that specialized little fan dies or makes lots of annoying noise. :/

I might have to go with EVGA this round instead, but I suppose the performance will determine that.
 

MrTransistorm

Senior member
May 25, 2003
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Or are you saying intel will use a totally different set of masks for LGA1356 and LGA2011 parts? because a link for that would be good. or some kind of link to back up what you're saying. had to chuckle a little at the 40 on-die lanes.
Do you have a link that shows that there are no PCIe controllers on SB-E? Everything I have seen so far indicates that it does. Also, I'm pretty sure that SB-E doesn't have QPI.
 

alyarb

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Jan 25, 2009
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Post links of your findings rather than ridiculous claims.
 
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MrTransistorm

Senior member
May 25, 2003
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Post your findings rather than outrageous claims.

Calm down. I'm not trying to start an argument. You merely made claims that contradict what I have read about SB-E. I just want to know where you got this information:

There is no PCI Express controller on the SNB-E die

Like Bloomfield, SNB-E has an external interface called QPI

Here are a few examples of the information I'm familiar with:

AnandTech:

http://www.anandtech.com/show/4291/additional-details-on-sandy-bridgee-processors-x79-and-lga2011

X79 natively supports dual x16 PCIe graphics, or quad x8 graphics, but this time the PCIe lanes come directly from the CPU instead of from the chipset, providing lower latency GPU access.

Tom's Hardware:
http://www.tomshardware.com/reviews/core-i7-3960x-x79-performance,3026-3.html

Upon introduction, X79 will attach to Sandy Bridge-E solely through a four-lane DMI link.
This image in particular. Note the DMI interface and PCIe lanes on the CPU.

Xbit:
http://www.xbitlabs.com/articles/cpu/display/lga-2011-idf.html
However, in reality the new platform differs much more from the LGA 1366 one. And these differences primarily come from its structure. The thing is that Intel X79 Express chipset will not be a new fully-functional two-chip chipset, like Intel X58, for example, but will shrink to just one South Bridge chip. So the PCI Express bus support comes from the CPU as well as regular Sandy Bridge processors for LGA 1155.
 
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alyarb

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Jan 25, 2009
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Sorry, I just got done reading this thing about how much work went into QPI 1.1 and believed they would use it the same way it had been used in Nehalem and Tukwila.

http://www.realworldtech.com/page.cfm?ArticleID=RWT072011132706&p=1

But all the block diagrams do show PCIe on die as well, so in a 2S/4S machine there will be no centralized PCIe or QPI. This is quite a feat as it means any CPU must be able to host any resource no matter which socket it traces into, and you can understand my resistance to buying that, particularly as it relates to 1356. Unless they only allow you one DIMM per channel I don't know how they are going to squeeze that. This will be the diagram I refer to from now on...

http://regmedia.co.uk/2011/05/29/intel_sandy_bridge_platform_2.jpg
 

MrTransistorm

Senior member
May 25, 2003
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Yeah, I seem to remember that it was originally supposed to use QPI. I'm not sure why that or many other things concerning S2011/X79 were changed. There are other people here who are far more knowledgeable about the platform than I am.

It does make you wonder how the EVGA SR3 is implemented.
 

alyarb

Platinum Member
Jan 25, 2009
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Oh wow, I have never heard of the SR3 but it looks to be like the exact sort of asymmetry that is implied by deleting the central PCI host. The first CPU gets most of the DIMMs and the PCH but everything else is physically divided but logically bridged with QPI. This would definitely explain all the emphasis that went into lane failover with QPI 1.1. If skulltrail teaches us anything there's a good chance intel will only let Xeons or some sort of EE work with it. The amount of die area devoted to this capability could even be enough for them to probably say let's not waste time validating this for the consumer i7's, as regular X79-based products have no need for any QPI.
 
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