Samsung and GLOBALFOUNDRIES Forge Strategic Collaboration to Deliver 14nm FinFET

[ThatBuzzkiller]

Man, this is old news ...

Anyways good idea on GF's part to license Samsung's 14nm node. Off-topic but FD-SOI was always just hype ...

FD-SOI had promised cost advantages in comparison to bulk FinFET but the argument was entirely yield driven given the amount of unfavourable assumptions of yield against bulk FinFET.

 

[krumme]

Who cares if there is even 10 different sets of people making slides if nothing relates to reality.

 

[mrmt]

FD-SOI had promised cost advantages in comparison to bulk FinFET but the argument was entirely yield driven given the amount of unfavourable assumptions of yield against bulk FinFET.

I think it is important to go a little beyond PR to see what the guys working on the actual products have to say about it. This is an interview with Maud Vinet, manager at CEA-LETI:

http://semiengineering.com/leti-outlines-fdsoi-monolithic-3d-ic-roadmaps/

SE: IBM, Leti, Soitec, ST and others are instrumental in developing FDSOI. How do you see FDSOI versus bulk finFETs?
Vinet: From my point of view, we might get different answers depending on the applications. For example, Intel went to finFETs, which from a technical point of view, is equivalent to fully-depleted SOI. From a technology point of view, finFETs are more challenging than planar FDSOI. Fully-depleted SOI is more straightforward. But depending on how much money you can spend, and depending on the market you’re addressing, you might prefer one option over another. The key is to choose the right technology for the right application.

(...)

That's from CEA-LETI itself, depending on the market you are going to address and how much money do you have, SOI is not the answer for you. I think he is implying that unless you have a lot of money to spend on making FinFET work, SOI might give you a good business proposition (albeit worse than a full fledged FinFET solution if you can afford it).

 

[NostaSeronx]

Who cares if there is even 10 different sets of people making slides if nothing relates to reality.

It was from the same people though. Both slides are from the Fab 8 manager.

(albeit worse than a full fledged FinFET solution if you can afford it).

20nm FDSOI is faster than most 14nm FinFET solutions with the increase in performance.

28nm FDSOI and 20nm FDSOI on UTBOX20 have both been upgraded in performance. Hence, 28nm FDSOI at Samsung and GlobalFoundries in the "Advanced" flavor out performs 20nm LPM. There is then the 30% increase in performance between 28nm FDSOI and 20nm FDSOI. Equating to a ~30% faster design than 20nm LPM for 20nm FDSOI.

20nm LPM/SOC to 14XM/16FF;
20% performance
38%/35% power savings
1.1x shrink

28nm FDSOI(Advanced Flavor) to 20nm FDSOI;
30% performance
I have looked for these but no results. Though, 0.9V Vddnom on 28FD to 0.7 Vddnom on 20FD has the similar performance.
2.1x shrink

Edit: Found it;
http://www.ieeeexplore.us/xpl/articleDetails.jsp?tp=&arnumber=6894343

55% power savings.

 

[krumme]

Okey we sort of get it by now. And it would be nice and all and very welcome. But imo now is the time for actual silicon and numbers

 

[mrmt]

20nm FDSOI is faster than most 14nm FinFET solutions with the increase in performance.

But that's what Maud Vinet was saying. Is it better than Intel, Samsung or TSMC FinFET implementation? Probably not, those companies have the expertise and the money to develop whatever they want in terms of FinFET. Is it better than what Globalfoundries, SMIC or UMC would be able to develop by themselves in terms of FinFET? FDSOI might have a shot here.

The point is, and I think it is clear enough for everyone to see, is that every SOI foundry with the sole exception of STM is also developing or soughing to acquire FinFET expertise for node development, but the FinFET foundries aren't developing SOI nodes.

Keep in mind that what we are seeing now is what was on the R&D pipeline of those companies years ago, and a lot of what we are seeing today is the work shouldered by IBM. With the demise of IBM foundry and of the CA, and STM refusing to take a leading role in developing 10nm and beyond, I don't see any meaningful for SOI in bleeding edge nodes.

Btw, Globalfoundries isn't really a good parameter for comparison of SOI and non-SOI nodes. GLF managed to screw up their entire R&D pipeline (28nm, 20nm and 14XM), so whatever numbers they show will be way way borked compared to what you can get at TSMC, Intel or Samsung on the same time frame of the FDSOI node.

 

[NostaSeronx]

Okey we sort of get it by now. And it would be nice and all and very welcome. But imo now is the time for actual silicon and numbers

20nm LPM(LPP @ Samsung) and 14nm FinFETs will be produced at Samsung for Samsung specific designs for negative margins.

STMicroelectronics will be producing 28nm FDSOI and 20nm FDSOI at positive margins. While, sharing this to GlobalFoundries and Samsung and with non-competitive fabless semiconductors at Crolles.

http://user2user.mentor.com/jawalant-joshipura/
There is a ~500 mm² design, jeez.

Should post this here as well;

-GlobalFoundries/Samsung 28nm FDSOI Flavors-
(SHP)Advanced -> Source/Drain strain engineering. (20nm LPM performance // 28nm HPP cost)
(G)Maximum -> Vt flavor tuning, Back-biasing. (28nm SHP performance // 28nm SLP cost)
(LP)Minimum -> 2 Vts, No back-biasing, exact density of 28SLP. (28nm HPP performance // 28nm LPS cost)

 

[csbin]

AMD Higher Up with diverse fabrication experience leaves for Global Foundries as SVP

http://wccftech.com/amd-higher-dive...ce-leaves-global-foundries-svp/#ixzz3KarXqgtm

 

[NostaSeronx]

GlobalFoundries is the "first" pureplay foundry to ship FinFETs.
http://i.imgur.com/WvwAyYw.png

14XM PPA;
http://i.imgur.com/NrPZ3Ei.png

14LPP PPA;
http://i.imgur.com/UslEg0v.png

I like the little error in the 14LPP where its area consumption does not have a minus. (10% to 15% is the area shrink for LPe/LPP)

So many GlobalFoundries roadmaps, so little synchronization.