Ryzen 7 2800H Raven Ridge AMD's first 7nm chip?

moinmoin

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As shown in AT's live blog:
ZABZ1rX.jpg

Two separate mentions for Raven Ridge.

A short video is also available on AMD's website. There the footnotes at the end of the page list following data:
"AMD Reference Platform, “Raven Ridge 2018” AMD Ryzen™ 7 2800H, 2x8GB DDR4-3200, Samsung VLV2560 SSD
Windows 10 x64 16299.64, Graphics Driver: 23.20.768.0, 1920x1080
"
 

EXCellR8

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Read about it a bit earlier and saw that there actually weren't any consumer grade 7nm parts being released until next year.
 

LTC8K6

Lifer
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Doesn't appear to be anything special, according to the internet. 35-45W high power 4C/8T mobile.
 

moinmoin

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With two more CPU cores?
It still sporting the name Raven Ridge and the model number 2xxx makes me expect a straight port without any changes. But the energy efficiency gains shown on the slide need to come from somewhere, so 7nm may be the cause? Or an actual optimized 12nm unlike PR?

Read about it a bit earlier and saw that there actually weren't any consumer grade 7nm parts being released until next year.
Yeah, the planned 7nm APU is Matisse which at the usual rate would come out in late 2019/early 2020.
 

Abwx

Lifer
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Assuming a linear scale RR 2017 is at about 12x while RR 2018 is at 16x, this is a 30% improvement, far from the announced 2x+ from 7nm vs 14nm, so this can be implemented with a mature GF s 12nm.
 

french toast

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Na, no chance in hell this is 7nm, makes no sense what so ever.
As others stated, this is most likely 12nm.
 

PeterScott

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Yeah, APUs lag pure CPUs. APUs will only get 7nm after main CPU only parts do.

If there is a release before then, it will almost certainly just a process tweak to "12nm".
 
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LightningZ71

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So, what are we looking at here? Is this just a binned Raven Ridge based product with an expanded thermal envelope? Then, in another 6 months, we'll get Picasso, which is a "power and performance optimized Raven Ridge architecture chip" as according to earlier slide releases? Or, will Picasso move to the 12nm process with optimized libraries? The efficiency uplift in the 3.6-3.9Ghz range for that process is significant. If they tweak the thermal and power management policy with respect to turbo frequencies, and maybe also enable PBO, they could make significant performance improvements on sustained performance benchmarks and improve gaming benchmarks due to not having to throttle as much without making any major increase in peak turbo frequencies. It would be essentially a BIOS update drop-in for any of the existing released products while improving most every benchmark for performance and battery life.
 

moinmoin

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I'm expecting this time AMD will optimize libraries of 12nm.
But wouldn't that be something AMD would do with Picasso? Raven Ridge was still 14nm while being counted toward the Ryzen 2xxx gen. So Picasso could be 12nm while being counted toward the Ryzen 3xxx gen etc...

No, Matisse is codename for Ryzen 3xxx series based on Zen 2 and Picasso for successor of Raven Ridge.
You're right, I was thinking of Renoir (first 7nm APU following above pattern), the APU version of Vermeer (Zen 3).

The old codename fir 7nm APU was greyhawk.. don't know if it was changed.
Seems to have changed to Renoir according to the roadmap slide from this March:
P2SWNcT.jpg

Edit: Wait, Vermeer doesn't even mention Zen 3 in this slide. Is Zen 3 for 2021 now?
 

dark zero

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But wouldn't that be something AMD would do with Picasso? Raven Ridge was still 14nm while being counted toward the Ryzen 2xxx gen. So Picasso could be 12nm while being counted toward the Ryzen 3xxx gen etc...


You're right, I was thinking of Renoir (first 7nm APU following above pattern), the APU version of Vermeer (Zen 3).


Seems to have changed to Renoir according to the roadmap slide from this March:
P2SWNcT.jpg

Edit: Wait, Vermeer doesn't even mention Zen 3 in this slide. Is Zen 3 for 2021 now?
Is Zen2+ now....
 

AtenRa

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I really want to see how the 12nm RR will get this high perf/watt, unless they have managed to get better efficiency from memory and iGPU.
 

LightningZ71

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I think that 12mm RR is going to get that power gain from operating more in the sweet spot of the Mhz/Power curve. It looks like RR is currently pushing past the inflection point on the curve to get it's rather impressive (for an APU) performance. If they keep the Mhz ratings sensible for 12nm RR, they'll be in a much better spot on that curve, and, in addition, the IF and other bits of the processor gain a lot from the improved process. That should help with idle power and non-turbo conditions as well.
 

NostaSeronx

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It would be interesting if Raven Ridge 2800H was 7LP/N7. That and it is the inverse of what people thought. Rather than a 35W-45W SKU, it was actually a 7.5W-12W SKU.

They shrunk and enhanced Vega on 7nm. Naturally before they go Navi in APU, they will use what is already available. All we need is to find a 7nm Zen. Then, it is cut and dry that Raven Ridge got the same treatment as Vega.

7nm DUV (Raven Ridge 2018 w/ Vega 20)
7nm EUV (Picasso 2019 w/ Navi)
5nm full EUV (Renoir 2020 w/ Next-gen)

TSMC is already in mass production for N7. GlobalFoundries apparently is ramping to mass production with 7LP.

N7/7LP without EUV has no frequency gains and only power gains. From information from another forum, but to lazy to search for it.
(It should be noted that frequency gains are peak frequency. So, if the boost is 3.8 GHz for a 14LPP, then 7LP will also have that boost.)

Throwing it out a 7nm APU would be 80 mm squared with a flat optimization(Zen+Vega shrunk from Raven Ridge 2017).
14LPP/12LP => ~300 die-per-wafer
7LP => ~700 die-per-wafer

Vega10 launched => August 14, 2017
RavenRidge 2017 w/ Vega IP launched => October 26, 2017
Vega20 sampled out by June 6, 2018 w/ launch in 2H 2018.
Raven Ridge 2018 w/ Vega 2.0 IP sampled out by August 2018 w/ launch also in 2H 2018?
(Both point to December 2018 launch at worst.)
 
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moinmoin

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@NostaSeronx So you think Raven Ridge is essentially just Zen+ regardless of process node and even the iGPU can change?

Honestly I think this is all way too optimistic. I just have no idea at all how Ryzen 7 2800H and the slide from OP fits with all the roadmap info we got up to now.
 

NostaSeronx

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@NostaSeronx So you think Raven Ridge is essentially just Zen+ regardless of process node and even the iGPU can change?
If 2800H is 7nm it would fit AMD's agenda:
"We knew 7nm would be a big challenge, so we made the bet, we shifted our resources onto the new node," Papermaster said earlier this month in an exclusive interview with CRN. "We didn't just dip our toe in the water. We went all in."

For AMD, going all in on the 7nm node meant aligning its design team, the foundries and the company's electronic design automation partners, which build all of AMD's computer-aided design tools.

There is at least four versions of 7LP.
7LP(DUV), 7LP+(EUV in BEOL), EUV 7LP(EUV in FEOL), 5LP(Stacked Nanosheet from thick 7LP fins)
EUV 7LP and 5LP are the same thing other than FinFET to Nanosheets.

Everything so far has indicated that Raven Ridge 2018 is a 35W APU on 14nm+ not 12LP.
 

PeterScott

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If 2800H is 7nm it would fit AMD's agenda:

Agenda or not, there is still a logical sequence for moving to a new process. That involves first ironing out the bugs in a CPU implementation and GPU implementation seperately, before combining them in an APU. Just like they did for the Original Raven ridge.

Also if this is still called Raven Ridge, there is Zero chance it is 7nm.

Oh and GF 12nm as used by AMD in Pinnacle Ridge is just 14nm+. There is no shrink at all.
 
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Abwx

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Raven Ridge is already using a 14nm+ process wich is an improvement over the 14LPP used for Summit Ridge, this was confirmed by AMD to Computerbase.de and the link posted in this forum at the time, dunno why the usual suspect keep on spreading total non sense at any occasion...

Edit : According to AMD 12LP provide 10-15% improvement over 14LPP, if we take the lower figure for 14LPP+ to 12LP improvement then the perf/watt improvement at isofrequency is 25% at same design, with a few power management tweaks it shouldnt be difficult to grab the remaining 5% to get to the numbers of the alleged Raven Ridge 2018.

Also the 2X+ improvement brought by 7LP imply that the 25X target will be largely exceeded since RR 2017 is at 12X on the curve, and that power managements should help raise the bar even further, actually they wouldnt even need to redesign the thing, a shrink would be enough.
 
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NostaSeronx

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If Raven Ridge 2018 is 14nm+ how does it achieve the energy efficiency gains shown in the slide?
Current tools are bad at predicting future performance. So refreshed bins potentially can have increased TT(nominal) corners or whatever. Edit: process performance is never static, GlobalFoundries, TSMC, everyone increases the performance of their node over time.

It can be seen in Stoney Ridge on 28HPA:
G1/2016 Bin: A9-9400 => 2.4 GHz / 3.2 GHz / 800 MHz / 10W
G2/2017 Bin: A9-9420 => 3.0 GHz / 3.6 GHz / 847 MHz / 10W-15W
G3/2018 Bin: A9-9425 => 3.1 GHz / 3.7 GHz / 900 MHz / 10W-15W
(Even, if in 10W cTDP those clocks would still be achievable.)

It is very key to note A9-9425 vs A9-9430(G2) (3.2 GHz / 3.5 GHz w/ 25W TDP) and A9-9410(G1) (2.9 GHz / 3.5 GHz also w/ 25W TDP)

2400GE/2200GE (35W) based on 2017 RR:
3.2 GHz / 3.8 GHz
3.2 GHz / 3.6 GHz
2800H/2600H based on 2018 RR:
3.35 GHz / 3.8 GHz
3.25 GHz / 3.6 GHz

Under HP:
2800H
2600H
2300U => 15W-25W
A9-9430 => 25W
A6-9230 => 25W
The HP lineup peaks out on 25W TDP. So, it is a refresh that might be 15W-25W like the 2300U SKU. Following the above switch for A9-9400 to A9-9420.

2700U w/ 2.2 GHz & 3.8 GHz @ 15W TDP
2800H w/ 3.35 GHz & 3.8 GHz @ 15W-25W TDP. With focus of it being more 25W rather than 15W. Like the A9-9420/A9-9425 for 15W.

1.15 GHz increase in nominal frequency with a very minor hit in TDP. (OT: It's minor since basically 15W and up all use 45W TDP copper heatsinks. Since, Intel screwed up their actual TDP measurements. Hence, why AMD jams these awful dual-gpu mobile solutions that rarely work after a driver update or bios update or windows update. It's free because Intel made it free for them.)
 
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Abwx

Lifer
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Current tools are bad at predicting future performance.

More non sense....

What are the current tools you re talking about, sliding rules and logarithms look up tables.??.

Here a free tool if you want to play with simulation of electronic circuitries using mathematical modelisation of actual transistors, you can even find spice models of (ST Micro) 22nm SOI finfets transistors if you google hard enough :

http://www.analog.com/en/design-center/design-tools-and-calculators.html