Question Raptor Lake - Official Thread

Page 83 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

Hulk

Diamond Member
Oct 9, 1999
4,525
2,519
136
Since we already have the first Raptor Lake leak I'm thinking it should have it's own thread.
What do we know so far?
From Anandtech's Intel Process Roadmap articles from July:

Built on Intel 7 with upgraded FinFET
10-15% PPW (performance-per-watt)
Last non-tiled consumer CPU as Meteor Lake will be tiled

I'm guessing this will be a minor update to ADL with just a few microarchitecture changes to the cores. The larger change will be the new process refinement allowing 8+16 at the top of the stack.

Will it work with current z690 motherboards? If yes then that could be a major selling point for people to move to ADL rather than wait.
 
  • Like
Reactions: vstar

nicalandia

Diamond Member
Jan 10, 2019
3,331
5,282
136
Maybe in a normal situation where the prices fall over time, and not go up instead.

The actual wafer production cost for Intel isn't all that much... but you have to factor in that you're paying a lot more than just the physical wafer and the labor involved. You're also paying in a way the future nodes.
True, if you think about the price per functional die is about 3% of the retail price so there are other things that are much more expensive than making them.
 

LightningZ71

Golden Member
Mar 10, 2017
1,798
2,156
136
While it is all buried in the accounting, the true cost of making a wafer for both TSMC and Intel includes all of the same components: R&D for the node, purchase, upkeep and depreciation of the equipment, the cost of raw materials, the time spent in labor to complete the process, the overhead of maintaining the fab, the portion of the construction cost of the fab that is amortized against that individual wafer, etc. The question is, is Intel's cost basis higher or lower than TSMC with respect to that one wafer? We will never know the full answer.
 

eek2121

Diamond Member
Aug 2, 2005
3,100
4,398
136
No way is a TSMC 7 nm wafer only 9k. It's more like 14-15 after the price hikes.

Depends on the size of the order and how long the customer has been using TSMC. The prices I heard were between $9,000-$10,000 for 7nm, $4,000-$7,000 for 6nm, and $13,000-$15,000 for 5nm. It is likely someone like AMD gets things cheaper, and someone like Intel has to pay more.
 

LightningZ71

Golden Member
Mar 10, 2017
1,798
2,156
136
Depends on the size of the order and how long the customer has been using TSMC. The prices I heard were between $9,000-$10,000 for 7nm, $4,000-$7,000 for 6nm, and $13,000-$15,000 for 5nm. It is likely someone like AMD gets things cheaper, and someone like Intel has to pay more.

If that difference in price between N7 dies and N6 dies is even remotely true, and TSMC's own statements about the portability of N7 designs to N6, its almost baffling that AMD hasn't done an N6 version of Zen3 as an in place upgrade to their line of N7 based Zen3 products just to decrease their own cost per working CCD. I realize that there would still be an R&D overhead to such a move, but, in volume, it should be more than made up in short order unless TSMC is flat out lying about the ease of porting those designs. We already see the improvements in Rembrandt's CCX over Cezanne while using what is essentially the same design. With a higher power budget, it seems logical that desktop CCDs should show an even better MT performance improvement.
 

jpiniero

Lifer
Oct 1, 2010
15,223
5,768
136
While it is all buried in the accounting, the true cost of making a wafer for both TSMC and Intel includes all of the same components: R&D for the node, purchase, upkeep and depreciation of the equipment, the cost of raw materials, the time spent in labor to complete the process, the overhead of maintaining the fab, the portion of the construction cost of the fab that is amortized against that individual wafer, etc. The question is, is Intel's cost basis higher or lower than TSMC with respect to that one wafer? We will never know the full answer.

Of course what it costs TSMC and what they charge are two different things.

If Raptor does end up being i5 K and above, that should be very telling that OEMs mostly rejected it. Probably because of the price. And the price is probably because of the die size and yields.
 
  • Like
Reactions: ftt
Jul 27, 2020
20,040
13,738
146
And to that I'd say, by the time Zen 5 or Zen 6 becomes available, the x670e chipset will not be an optimal solution for those CPUs and they will be held back in performance and features.
Personally, I would take a drop-in upgrade even with reduced features, like whenever and especially many years afterwards. Maybe not an issue for Linux folks but I prefer my Windows activation or license to not crap out over a hardware upgrade. I'm the type that hates re-installing everything and would prefer a slightly bogged down working Windows installation rather than a brand new empty one, that I then have to waste time populating with applications/games I need.
 

maddie

Diamond Member
Jul 18, 2010
4,881
4,951
136
If that difference in price between N7 dies and N6 dies is even remotely true, and TSMC's own statements about the portability of N7 designs to N6, its almost baffling that AMD hasn't done an N6 version of Zen3 as an in place upgrade to their line of N7 based Zen3 products just to decrease their own cost per working CCD. I realize that there would still be an R&D overhead to such a move, but, in volume, it should be more than made up in short order unless TSMC is flat out lying about the ease of porting those designs. We already see the improvements in Rembrandt's CCX over Cezanne while using what is essentially the same design. With a higher power budget, it seems logical that desktop CCDs should show an even better MT performance improvement.
I suggest that this has to do with the server world. Even though we might think its a trivial change, they would need to validate such a change. Contrast with the integrated die products. Constant, almost annual change.

The existence of N24 die as the sole Navi 2 on 6nm for the lowest end product suggests that it is cheaper.
 

LightningZ71

Golden Member
Mar 10, 2017
1,798
2,156
136
Even just spinning a line for desktop and Threadripper (especially threadripper where the better power/thermal situation could have an outsized impact), where the price per die is arguably even more important on what is now a trailing product with lower ASPs, would seem to make at least some financial sense...

As for validation for Epyc, I agree, it would be a big task. However, they are on the hook to support Epyc processors for 3+ years minimum. That's a long time to keep an aging node on a higher cost structure employed.
 
Last edited:

inf64

Diamond Member
Mar 11, 2011
3,865
4,549
136
MLID has a video out with supposed Raptor Lake pricing:

1663410909402.png

Pretty much aligned with Ryzen 7000 prices. Outlier could be 13600K - if it launces at $329 then it's clearly a better choice than both 7600X and 7700X no matter *if* it loses in ST or games (by a bit).
 

Rigg

Senior member
May 6, 2020
540
1,273
136
MLID has a video out with supposed Raptor Lake pricing:

View attachment 67695

Pretty much aligned with Ryzen 7000 prices. Outlier could be 13600K - if it launces at $329 then it's clearly a better choice than both 7600X and 7700X no matter *if* it loses in ST or games (by a bit).
He's really going out on a limb there. :rolleyes:

Unless you were going to leak the specific 1000 unit tray prices they always put in their presentations, I'm not sure why you would bother putting this out there. Even if this actually came from a "source" this isn't specific enough to be of any value. This is essentially a copy/paste of 12th gen MSRP with a range of up to 10% more added for wiggle room.
 
Last edited:

IEC

Elite Member
Super Moderator
Jun 10, 2004
14,441
5,434
136
I expect it to be more than 10% more expensive than Alder Lake given market conditions and their need to inflate their ASP.

If Raptor Lake is as competitive as everyone expects it to be, people will pay out the nose for the top SKUs.
 
  • Like
Reactions: ZGR

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
26,168
15,315
136
I expect it to be more than 10% more expensive than Alder Lake given market conditions and their need to inflate their ASP.

If Raptor Lake is as competitive as everyone expects it to be, people will pay out the nose for the top SKUs.
Exactly. Intel still has a reputation, although a little tarnished in some circles. And there many enthusiast's that don't care if it takes up to 350 watt or more.
 
  • Like
Reactions: ZGR

Det0x

Golden Member
Sep 11, 2014
1,299
4,234
136
We also tested the IPC of the E core:
1663444257710.png

Due to the obvious optimization of the internal cache part and the further optimization of the core access delay, the IPC of Ecore has changed significantly, and the average IPC improvement is about 6%.

In addition to the GCC part, we also tested SPECint2017 with the combination of Clang 10+Gfortran 12. In the following table, we removed the score of the 548.exchange2_r project, which is only used to compare the performance of the C/C++ project for comparison with the mobile terminal mobile phone SOC for comparison.

It is important to note that the memory used in this review is not JEDEC-spec, as performance is slightly different than when using JEDEC memory.
1663444357370.png

We first tested the single-threaded performance at the default frequency, and we can see that the improvement is about 13% under the defualt frequency.
1663444432508.png

Further, we conducted a 3.6GHz co-frequency test, which is consistent with the results of SPEC2017. It can be seen that the co-frequency performance of the two cores of RPC/GLC is basically the same

We also tested the IPC of the E core
1663444536982.png

Since the investigation of Geekbench is more inclined to the ALU part, and the investigation of the internal cache is relatively weak, the results here are slightly different from those in SPEC2017. In GB5, the int part of Ecore is almost unchanged, while the FP part is the same as that of SPEC2017. The results are close, about a 6% improvement.
 
Last edited:

Det0x

Golden Member
Sep 11, 2014
1,299
4,234
136
Game test:

In order to ensure the fairness and uniformity of the test, the demo and frame number statistics that come with the game are used, and each game runs the demo five times, and takes the average value. Invalid, make up the test once. If the frame number statistics of the game itself include decimals, the decimals of the corresponding number of digits will be reserved, otherwise, they will be rounded up.
1663444893984.png
In high-frame games that focus on more CPUs, such as Ashes of Singularity, CSGO, etc., the improvement of 13900K compared to 12900K can be 10%+. If the graphics card is replaced with a higher-end model, then this gap will continue to be enlarged.

Intel's magic modification of the Ring bus reduces the access latency of Ecore. At the same time, the Ring frequency of RPL is decoupled from Ecore, so there will no longer be the problem that the Ring slows down significantly when the ADL is loaded with small cores.

However, the RPL will still slow down. The 13900K will be downclocked from Auto 5000MHz to 4600MHz, but the improvement is much larger than that of the 12900K, but it means that you can still improve the game performance by turning off Ecore.

Energy efficiency test:


We first performed a simple power consumption test:

In the AIDA64 FPU scenario, the power consumption of 13900K DDR5 is about 253w, and the core frequencies at this time are about *** and ***.

In the Z690 motherboard and the August BIOS, the power consumption after unlocking the power wall is about 343w, the voltage at this time is around 1.4V, and the core frequency is about 5.5 GHz for the P core and 4.3 GHz for the E core.
1663444992512.png

Conclusion:

One year after the release of the Alder lake product, Intel obtained a new generation of Raptor lake with higher frequency and better energy efficiency by further relaxing the CPP's 10nm Enhanced Super Fin plus (Intel 7+) process. By increasing the frequency and the number of small cores, while increasing the single-threaded performance by about 12%, the multi-threaded performance has been greatly improved to compete with the new Zen 4 released by AMD this year.

No matter who will die in this generation and who will become the king of single-threaded/multi-threaded performance in this generation, I think this should be the best era of semiconductor development in the past decade.

Because this is the most competitive era, it is also the most beneficial era for consumers. With fierce competition, there will be continuous progress, no matter what the field is. 作者:ECSM_Official https://www.bilibili.com/read/cv18648273 出处:bilibili
 
Last edited:

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
26,168
15,315
136
I am dying to see how that compares to a retail 7950x, but in 9 days we should know. That will save arguments.

But I must says, 42% boost for 45% more power and 343 watts total seems insane. How would you cool that ? AIO are only 250 watt I think. Custom WC only ?
 
  • Like
Reactions: Kaluan

Exist50

Platinum Member
Aug 18, 2016
2,452
3,102
136
I hate that we have a clear language barrier with the Author of the Tests..

So am I correct to say 42% MT boost for 45% more power consumption(When unlimited power mode)? right?
That s 43% more power, from 240 to 343W, so basically the same perf/watt at these conditions than ADL.
It looks like about a 42% boost when both are in unlimited mode. Though I don't see a mention of how much power the 12900k consumes in that scenario. But out of the box, we'll probably see a smaller performance gap but greater efficiency improvement.
 
  • Like
Reactions: Kaluan

Det0x

Golden Member
Sep 11, 2014
1,299
4,234
136
TLDR:

13900k compared to 12900k:
  • ~12% higher ST / gaming performance
  • ~ 42% higher MT performance at "unlimited mode"
  • Power usage have increased from 236w to 343w to reach performance numbers above

  • P-core IPC increase is basically nothing ~1-3%
  • E-core IPC increase is ~6%
  • Most of performance increase comes from higher clockspeeds
Seem to be higher memory latency in aida because of the more stops on the ringbus, but the L1, L2 and L3 bandwidth is increased substantially.
Ecore only downlock the ringbus to 4.6ghz instead of 3.6ghz when they are in use
 
Last edited: