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RAM clock dependent on total capacity?

ram_question

Junior Member
Hi,

a friend is currently assembling a Dell server and plans to have at least 384 GiB of RAM in it. The board (I don't know the specific model, but could ask if requested) has 24 memory slots. The memory (Kingston) is comprised of 16 GiB modules clocked at 1866 MHz. When fully equipped, however, the board only allows a clock rate 1600 MHz. The full clock is only permitted when less slots i.e. less total capacity is installed.
Dell support didn't provide us with a satisfying answers but I fear we shall have to accept the fact (as there is no BIOS update or anything that could help solve the issue).
Nevertheless I would like to know if there is a technical or physical reason for this limitation. Is there some kind of intrinsic barrier that comes into effect at high RAM frequencies? I myself never had problems with large-memory servers but they were always clocked at 1333 MHz or lower.

Thank you very much for any insight.
 
these things are platform specific
ie: memory controller, power delivery, voltages/latencies, etc.
The board maker's bios is likely limiting as a safety/guarantee consideration. Maybe they didn't design it with that speed in mind or didn't validate/test it.

They are just trying to "play it safe" I suppose. Which, with that much memory, probably isn't a bad idea.
If the bios allows it, you could try forcing higher speeds. If you do this be sure to thoroughly test the stability. You might have to change voltages, relax timings, etc.

Just my 2 cents
 
If you really wanted the extra speed and care enough to, modifying the BIOS to allow higher speeds shouldnt be too hard.

But Dell does put a lot of artificial limitations in their systems, to ensure they are all functioning within the spec they were tested for.
 
its a server, there isn't a lot of customizing out there. its not dell also, you can pretty much find this on every server

• Number of DIMMs populated. The number of DIMMs attached to a memory controller also affects the loading and signal integrity of the controller’s circuits. In order to maintain signal integrity, the memory controller may operate DIMMs at lower than their rated speed. In general, the more DIMMs that are populated, the lower the operational speed for the DIMMs.


here's hp's white paper on the same subject
http://h20565.www2.hp.com/portal/si...x.portlet.endCacheTok=com.vignette.cachetoken
 
Thanks for the answers and links so far, interesting reads. Wikipedia states that the capacitive load of many parallel memory cells causes a "slurring"/fading of the signal edges and thus a need for reducing the clock. This explains the background and I suppose there is no sane way around this issue but to wait for technology improving 🙂
 
I wouldn't worry about memory speeds. I'm running DDR3-1333MHz 8GB and my system is still fast as hell.What kind of CPUs are you putting in there?
 
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