Question for any Yorkfield owners

ghost recon88

Diamond Member
Oct 2, 2005
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Does CoreTemp report a different VID for your chip when its idling @ 6x versus under full load? In order to see the change, you need to have C1E and SpeedStep enabled. I've seen some chips do change reported VIDs, and some don't.
 

ghost recon88

Diamond Member
Oct 2, 2005
6,196
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Originally posted by: Cogman
Yes, EIST changes both voltage and multiplier.

When you say changes voltage, I know it changes the amount of voltage CPU-Z reports (unless you have LLC enabled) but it also changes the VID that CoreTemp reports? Is there a normal set amount of voltage it normally drops in CoreTemp? Like .15v or something?
 

Idontcare

Elite Member
Oct 10, 1999
21,110
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There are eight (8) VID's for Yorkfield CPU's. Each is programmed for a specific power state.

The one most people are interested in is the VID for when the chip is loaded...the C0 state.

When C1E activates during idle the CPU is read for the multi and Vcc to go to. The Vcc it goes to is the VID for the C1E state.

See page 16 of http://download.intel.com/desi...or/datashts/318726.pdf

Here's what Intel's processor datasheets have to say about the function of VID:
The VID (Voltage ID) signals are used to support automatic
selection of power supply voltages (VCC). Refer to the Voltage
Regulator Design Guide for more information. The voltage supply
for these signals must be valid before the VR can supply VCC to
the processor. Conversely, the VR output must be disabled until
the voltage supply for the VID signals becomes valid. The VID
signals are needed to support the processor voltage specification
variations. See Table 2-1 for definitions of these signals. The VR
must supply the voltage that is requested by the signals, or
disable itself.

As to your question of whether coretemp reports any of the VID's other than the one for loaded conditions...good question. I have heard from people that coretemp can be tricked into reading the C1E VID by loading coretemp in such a way that as it loads the CPU remains in the C1E state. (i.e. convince the CPU it isn't be loaded during the time you open core temp and then when core temp initializes it reads the current VID set for C1E as if it were the VID used for loaded operation)

I myself have never gotten such a trick to work, although I don't have yorkfield (only kentsfield here) so that may be why.