Some review here mentioned about "Full length PCI card", what is mean by full length and not full length? Then I saw that some board share IRQ. I am wondering that how the OS know which devices interupt it since there are several PCI slots that share the same IRQ. Can anyone please provide a good explaination?
RDRAM Facts
At the above article, Anand said:
Remember that RDRAM is a serial device, so at any given time, you're transferring one bit of data at a time instead of transferring multiple data bits in parallel, which is the case in SDRAM.
I don't understand this. Since RDRAM has 16 bit wide bus (16 traces, right?), and we are only transfering 1 bit at a time, what are those 15 bit remaining bus used for?
Then in i840 chipset, it use 2 channel RDRAM. What is this 2 channel mean? Is it having 2 independant 16 bit bus (32 bit bus in total)? In i850 chipset, we need to install 2 RDRAM together at once right (due to 2 channel RDRAM design)? Why 2 channel will require 2 RDRAM to be install together?
In the same article, Anand said that it uses some mobo eg Abit uses 4 layers PCB design. Is it means that there are even traces inside the board (not on the 2 top surface)? How do manufacturer do that and why having more layer is better as in the case of PC100 SDRAM?
And then back to the SeverSet III HEsl article:
AnandTech ServerSet III article
The author mentioned about 2 way interleaving at PC133 will enable DDR performence. What is this 2 way interleave means? What about 4 way interleave, what it means?
Thank you
RDRAM Facts
At the above article, Anand said:
Remember that RDRAM is a serial device, so at any given time, you're transferring one bit of data at a time instead of transferring multiple data bits in parallel, which is the case in SDRAM.
I don't understand this. Since RDRAM has 16 bit wide bus (16 traces, right?), and we are only transfering 1 bit at a time, what are those 15 bit remaining bus used for?
Then in i840 chipset, it use 2 channel RDRAM. What is this 2 channel mean? Is it having 2 independant 16 bit bus (32 bit bus in total)? In i850 chipset, we need to install 2 RDRAM together at once right (due to 2 channel RDRAM design)? Why 2 channel will require 2 RDRAM to be install together?
In the same article, Anand said that it uses some mobo eg Abit uses 4 layers PCB design. Is it means that there are even traces inside the board (not on the 2 top surface)? How do manufacturer do that and why having more layer is better as in the case of PC100 SDRAM?
And then back to the SeverSet III HEsl article:
AnandTech ServerSet III article
The author mentioned about 2 way interleaving at PC133 will enable DDR performence. What is this 2 way interleave means? What about 4 way interleave, what it means?
Thank you