- Oct 9, 1999
- 72,636
- 47
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Quad Data Rate SRAM Technology
- Thread starter NFS4
- Start date
This is the first time I have heard of this. That looks really sweet, thanks for the link NFS4. Iam reading it now.
A couple of points, this RAM is really DDR, except that there are 2 seperate channels into the same RAM.
This RAM is not covered by Rambus' patents because it is SRAM (Static RAM) rather than DRAM (Dynamic RAM).
As it is SRAM, it is going to be appallingly expensive - by that I mean, about $25 for 512 kB, expensive.
This RAM is best suited for applications where a relatively small amount of memory is needed, and where 2 seperate devices need to share access - the classic example is in a network router. A data packet can be captured and added to the buffer, at the same time that a packet already in the buffer can be being re-transmitted.
This RAM is not covered by Rambus' patents because it is SRAM (Static RAM) rather than DRAM (Dynamic RAM).
As it is SRAM, it is going to be appallingly expensive - by that I mean, about $25 for 512 kB, expensive.
This RAM is best suited for applications where a relatively small amount of memory is needed, and where 2 seperate devices need to share access - the classic example is in a network router. A data packet can be captured and added to the buffer, at the same time that a packet already in the buffer can be being re-transmitted.
Mark R is correct. This is not memory suited for a PC.
The memory is in fact dual channel DDR, with dedicated read and write channels. (I didn't even notice that it was SRAM the first time I read it)
SRAM is 4 of more times as large as DRAM making it very expensive to produce.
This is not a good configuration for a PC because a PC performs many more reads then writes. In addition Writes are not time sensitive in a PC. (A chipset can wait until the memory bus is free before performing a write.)
True quad data rate transmission usually involves multiple signal levels. This means that data is still only sent on the rising and falling edges of the clock, but the data lines can have 4 values instead of 2. Using 4 values instead of 2 allows you to send 2 bits instead of 1 therefor sending twice as much data. Techniques like this are often used in telecommunications and similar techniques are even used in modems.
RDRAM II does use this technique but the channel length of the specification is so short that it is totally unsuitable for PC main memory. In fact it looks to me like these two memories will likely compete in embedded and networking applications.
The memory is in fact dual channel DDR, with dedicated read and write channels. (I didn't even notice that it was SRAM the first time I read it)
SRAM is 4 of more times as large as DRAM making it very expensive to produce.
This is not a good configuration for a PC because a PC performs many more reads then writes. In addition Writes are not time sensitive in a PC. (A chipset can wait until the memory bus is free before performing a write.)
True quad data rate transmission usually involves multiple signal levels. This means that data is still only sent on the rising and falling edges of the clock, but the data lines can have 4 values instead of 2. Using 4 values instead of 2 allows you to send 2 bits instead of 1 therefor sending twice as much data. Techniques like this are often used in telecommunications and similar techniques are even used in modems.
RDRAM II does use this technique but the channel length of the specification is so short that it is totally unsuitable for PC main memory. In fact it looks to me like these two memories will likely compete in embedded and networking applications.
About a year ago someone joked about this, and was shot down because "QDR was impossible"...Technology marches on.
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