I'm wondering if there's an easy way to tell HOW your memory is really
interleaved and a physical 64 bit address maps to a specific DIMM and DIMM
ROW/COLUMN address --
OS call, library utility, simple FAQ for each chipset, or whatever.
I don't mean MMU mapping of VIRTUAL addresses to physical addresses, I literally
mean which memory cell in which DIMM has byte number X PHYSICAL 64 bit address.
Specifically on modern chipsets like Nforce4, P35 Bearlake, perhaps others.
I'm sure I could read the chipset documentation and get some priviledged code to
actually read the memory controller registers of the chipset and see that the settings
are, but I assume that it's a common enough need that there may be
FAQs / libraries / OS calls / BIOS calls / whatever to help do this.
On a dual BANK (2 banks of 64 bits wide per DIMM) it'd have to alternate
between banks every so often though if that's always every QWORD (even/odd)
or what I don't recall.
I'd assume each byte within a group of 8 for a 64 bit wide DIMM is just in order
0, 1, 2, 3, 4, 5, 6 7.
On dual channel memory controllers with 2 DIMMs installed it'd have to alternate
between channels, but how it'd choose the BANK and CHANNEL ordering IDK.
If you had four dual bank DIMMs installed in a dual channel chipset then it'd
have to interleave somehow over 4 DIMMs and 2 banks per DIMM.
Anyway that's the kind of detail I'm looking for.
Thanks in advance!
interleaved and a physical 64 bit address maps to a specific DIMM and DIMM
ROW/COLUMN address --
OS call, library utility, simple FAQ for each chipset, or whatever.
I don't mean MMU mapping of VIRTUAL addresses to physical addresses, I literally
mean which memory cell in which DIMM has byte number X PHYSICAL 64 bit address.
Specifically on modern chipsets like Nforce4, P35 Bearlake, perhaps others.
I'm sure I could read the chipset documentation and get some priviledged code to
actually read the memory controller registers of the chipset and see that the settings
are, but I assume that it's a common enough need that there may be
FAQs / libraries / OS calls / BIOS calls / whatever to help do this.
On a dual BANK (2 banks of 64 bits wide per DIMM) it'd have to alternate
between banks every so often though if that's always every QWORD (even/odd)
or what I don't recall.
I'd assume each byte within a group of 8 for a 64 bit wide DIMM is just in order
0, 1, 2, 3, 4, 5, 6 7.
On dual channel memory controllers with 2 DIMMs installed it'd have to alternate
between channels, but how it'd choose the BANK and CHANNEL ordering IDK.
If you had four dual bank DIMMs installed in a dual channel chipset then it'd
have to interleave somehow over 4 DIMMs and 2 banks per DIMM.
Anyway that's the kind of detail I'm looking for.
Thanks in advance!
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