Adul
Elite Member
http://www.pvrgenerations.co.uk/cgi-bin/viewarticle.cgi?page=/articles/2002/kristof1102&printer=0&pagenum=1
Q8: Speaking of T&L units/geometry processors, it has been noted over and over again that deferred renderers may expose a weakness concerning data flow on the vertex side as applications/games become more complex. Do you consider it really a problem or are there already effective ways present to circumpass that hypothetical limitation?
The ideal operating environment for a tile based renderer is where all the scene data is available for the HSR in one go - this maximizes the benefits of deferred texturing. However PowerVR does not require that this is the case and incorporates sophisticated parameter management and compression hardware which allows the parameter data buffer size to be fixed and automatically manages intermediate renders if required while retaining full compatibility. Our research teams are constantly working on improved versions of the already impressive technology advantage we have in this domain.
Q8: Speaking of T&L units/geometry processors, it has been noted over and over again that deferred renderers may expose a weakness concerning data flow on the vertex side as applications/games become more complex. Do you consider it really a problem or are there already effective ways present to circumpass that hypothetical limitation?
The ideal operating environment for a tile based renderer is where all the scene data is available for the HSR in one go - this maximizes the benefits of deferred texturing. However PowerVR does not require that this is the case and incorporates sophisticated parameter management and compression hardware which allows the parameter data buffer size to be fixed and automatically manages intermediate renders if required while retaining full compatibility. Our research teams are constantly working on improved versions of the already impressive technology advantage we have in this domain.
