Poulson Intel 50mb cache CPU

[tweakboy]

http://www.tomshardware.com/news/Intel-Poulson-Itanium-Tuwila-Nehalem-Core-i7,12072.html

Thanks

 

[soccerballtux]

wow!

 

[soccerballtux]

this much power?!?!?!?!

 

[tweakboy]

Thx Hennensey for the find.

 

[podspi]

At 50mb, you're well past the point where you could load an entire (lightweight) modern OS in the CPU cache.

I realize that this is probably one of the worst uses for a CPU as powerful as the one we're discussing, but dang...

As it is, could easily boot Dos + Win 3.x on most modern CPUs and have the entire thing running in cache. Not that it matters much, since a toy could run those OSes now, but it really blows my mind sometimes how far we've come...

 

[OBLAMA2009]

why is a link to an 8 month old article exciting?

 

[soccerballtux]

At 50mb, you're well past the point where you could load an entire (lightweight) modern OS in the CPU cache.

I realize that this is probably one of the worst uses for a CPU as powerful as the one we're discussing, but dang...

As it is, could easily boot Dos + Win 3.x on most modern CPUs and have the entire thing running in cache. Not that it matters much, since a toy could run those OSes now, but it really blows my mind sometimes how far we've come...

hm maybe, that cache is split between the processors I bet. Or maybe they all have access to the same cache..that would be strange.
DOS and Win3.1 aren't written for VLIW architectures though-- there wouldn't be very good benefit.

 

[exar333]

hm maybe, that cache is split between the processors I bet. Or maybe they all have access to the same cache..that would be strange.
DOS and Win3.1 aren't written for VLIW architectures though-- there wouldn't be very good benefit.

Cache should be shared between the cores...

 

[Tuna-Fish]

This was already well looked at by RWT. Basically, the 50MB is the total amount of caches of all kinds in the CPU. The largest cache is a 32MB shared L3.

 

[soccerballtux]

hm maybe, that cache is split between the processors I bet. Or maybe they all have access to the same cache..that would be strange.
DOS and Win3.1 aren't written for VLIW architectures though-- there wouldn't be very good benefit.

Cache should be shared between the cores...

In a perfect world, maybe. But L1 cache is never shared between cores. L2 cache is, sometimes. In AMD, this is not the case. L3 cache is in AMD's parts.

 

[soccerballtux]

This was already well looked at by RWT. Basically, the 50MB is the total amount of caches of all kinds in the CPU. The largest cache is a 32MB shared L3.

this is also the slowest

 

[soccerballtux]

why is a ring bus "good" or "fast"?

 

[tweakboy]

When are we going to see this 50mb cache CPU's ???

 

[Edrick]

When are we going to see this 50mb cache CPU's ???

Are you planning to buy one? Please share some benchmarks when you do. Personally, I will use the $10K that a system costs and buy myself a SB-E system and have enough left over to pay my mortgage for a year.

But if you are buying one, then Feb 2012 is what I am hearing.

 

[tweakboy]

Are you planning to buy one? Please share some benchmarks when you do. Personally, I will use the $10K that a system costs and buy myself a SB-E system and have enough left over to pay my mortgage for a year.

But if you are buying one, then Feb 2012 is what I am hearing.

Good info Edrick.. Feb 2012 50mb cache ? Are you sure ? If Sandy 2600k is most powerful desktop CPU for 300 dollars,, then how much would the fastest ivy cost ? hmmmm

 

[Idontcare]

When are we going to see this 50mb cache CPU's ???

Your own 8+ month old article already told you, it won't be until next year.

also mb != MB

50 mb = 50 mega-bits = ~6.25 mega-bytes = ~6.25 MB

Lastly, consider that this is (1) Intel, and (2) an Itanium product...that means you take any projected timelines for product availability and you add 2yrs to it in order to have a realistic expectation of availability.

 

[tweakboy]

Your own 8+ month old article already told you, it won't be until next year.

also mb != MB

50 mb = 50 mega-bits = ~6.25 mega-bytes = ~6.25 MB

Lastly, consider that this is (1) Intel, and (2) an Itanium product...that means you take any projected timelines for product availability and you add 2yrs to it in order to have a realistic expectation of availability.

Yeah i agree with that we wont see 50mb cache CPU's until 2013 or 2014 after looking at all the facts. However for Feb 2012 they will have 15 or 20mb cache CPUs... What is the Sandy E 3960 ? ty

 

[Outrage]

Yeah i agree with that we wont see 50mb cache CPU's until 2013 or 2014 after looking at all the facts. However for Feb 2012 they will have 15 or 20mb cache CPUs... What is the Sandy E 3960 ? ty

IDC gave it a try, i will see if i do better.

The cpu you own right now have more then 50mb of cache. Yeah thats right, that old q6600 have more then 50mb of cache!

 

[jhu]

Itanium is still around because the suckers who bought into it can't leave very easily. Oracle and Microsoft are dropping/have dropped support, so that leaves just HP and a few minor players.

If anyone wants to play around with an Itanium system, they can be had on eBay for not too much money.

 

[Idontcare]

What's amazing about Oracle is that given the choice of throwing their lot in with Itanium or with Sparc...they went Sparc D:

Larry is one smart dude, so what does that say about Itanium

Given Intel's process tech advantage, I really would have bet on Intel winning that horse race, and yet Itanium has been around for more than a decade now and it is nowhere near dominating the big-iron market.

That said...DEC managed to go bankrupt in the midst of having the industry's crown-jewel of microarchitectures, and Cray nearly did the same. So there's something to be said about poor business decisions I suppose.

 

[jhu]

Itanium still makes money for Intel and is a larger market (in terms of sales) than all of AMD's supposedly.

Big iron is IBM for the foreseeable future.

 

[lol123]

Poulson looks like it will bring some impressive gains over Tukwila, not only with 50 MB of cache but doubled execution width (6 to 12), improved multi-threading with independent execution at the front and back end of the pipeline, a much greater focus on out-of-order execution than before and something they call the Instruction Replay Mechanism for RAS. I think Intel might be able to have a good run with Itanium all the way through Kittson, until it's finally replaced by x86. That is probably bound to happen no matter how much Itanium improves. One important factor is the dropping of software support that has been mentioned and another indication is the way that Intel keeps adding RAS features introduced on the Itanium to the EX/RISC replacement Xeon line (and even using the same chipset for both processors).

A couple of interesting links:

http://realworldtech.com/page.cfm?ArticleID=RWT051811113343
http://www.theregister.co.uk/2011/08/22/intel_poulson_itanium_update/
http://www.slideshare.net/PaulineNist/intel-itanium-poulson-update-at-hotchips

 

[Edrick]

Poulson has the potential of being a great performer. Who knows what that would do to the market.

 

[Ferzerp]

Yeah i agree with that we wont see 50mb cache CPU's until 2013 or 2014 after looking at all the facts. However for Feb 2012 they will have 15 or 20mb cache CPUs... What is the Sandy E 3960 ? ty

The E7 Xeons already top out at 30MB of cache and have been around since May-ish time frame. So yeah, you're a little behind here.

The E7-2870 is an interesting beast. We've only used it in a single quad socket system though. Few applications warrant that type of compute power in a single box.

 

[Smartazz]

The E7 Xeons already top out at 30MB of cache and have been around since May-ish time frame. So yeah, you're a little behind here.

The E7-2870 is an interesting beast. We've only used it in a single quad socket system though. Few applications warrant that type of compute power in a single box.

Since when were there 10 core processors? Obviously this is a niche product, but the price tag is pretty funny, "Recommended Channel Price $4227.00". Granted this chip probably rivals a lot of dual socket systems.