PM's take on the Intel Article

[Shalmanese]

I just wanted pm's opinion on the article posted on the front page (link). It sounds very interesting though a bit shallow.

 

[YossI]

Intel Makes good ALUs in fact - they make very very good ALUs! darn right amazing ones!
low power low leakge extremly fast!

kind of bad thier current microprocessor arcihtecture isnt even close to be as good or sufficent
to feed thier fantastic ALUs...

im not joking about it - most of what see from intel is ALU demos... and highly overcloked northwood demos which use
very fast ALUs...

 

[rimshaker]

Cool! I have a new dream job now... game tester/player in the CV lab

 

[Eskimo]

FIB gets a whole page in the article? Is that really necessary? I mean if you wanted you could write pages about various F/A methods and tools but its inclusion in this type of article seems sort of strange. The article in general seemed sort of random. I understand it's difficult to write about a subject as complex as this for an intended audience that is basically in the dark about what goes on inside of these companies but a little focus would be nice and make the articles flow much better.

 

[Evadman]

Anand probably wrote out a hole 200 page article, then had to send it to Intel to be sure that no propritary information was released. Intel I am sure, parsed the article. Anand could have done damage to Intel, and I am sure PM could as well. Just as PM has to make sure he does not release any info taht is not public, Anand would have to do the same.

 

[pm]

I guess the main point is that they clearly took Anand around the more interesting sections of whichever site he toured (a couple of the pictures made it look like SC9, but I am curious where he went).

The first half was of IAL's R&D facility, and the second half was the test and validation section. The first half of the article reads almost like IAL's current research agenda. Two of the main topics, adaptive body biasing and high-speed ALU's, were presented about a week ago at the ISSCC 2002 conference by IAL/MRL researchers in three different papers. The second half of the tour focused on what test and validation which makes sense if he were to visit the design facility it is really just a seemingly endless sea of cubicles filled with quiet engineers clicking madly. Pretty boring stuff. The test and validation section is a lot more interesting. Devices like the LVP and FIB are rarely mentioned outside of very high-tech circles so I think it was kinda neat to see them in print. FIB machines are truly amazing when you actually think about them, and the idea of a device that can probe a chip while running without touching it at all is pretty cool as well (not as cool, IMO, as the old E-Beams were, but those went the way of the dodo when flip-chip became the new thing).

Overall it's kinda neat to see an article that talks about things that no one tends to talk about. Adaptive body-biasing is a pretty technical subject and you wouldn't see a lot of articles about it in the mainstream press. The whole article is a little vague, but I think that's just because you could continue to dive deeper into these subjects and completely lose the audience as a whole.

 

[CTho9305]

wow... you can fix a chip post-fab? thats pretty amazing!

 

[Eskimo]

<< FIB machines are truly amazing when you actually think about them >>



I know, I used to run one from time to time.



<< Overall it's kinda neat to see an article that talks about things that no one tends to talk about. Adaptive body-biasing is a pretty technical subject and you wouldn't see a lot of articles about it in the mainstream press. The whole article is a little vague, but I think that's just because you could continue to dive deeper into these subjects and completely lose the audience as a whole. >>



I guess i'm just bitter because as usual the design boys get all the glory and manufacturing isn't even mentioned. You guys just ensure that you can make 1 die on silicon that functions and then you throw it onto manufacturing for us to work out all the problems and turn that 1 die into 100+ in order to make it a product that can make money for the company. What about the Q/A testing after fabrication? What about burn-in, sort, F/A, or any of the other tests manufacturing runs before sending the product to the customers? What about advances in processing like automation, the move to mini-environments, advanced feed forward/back process control, WIP management software, etc?



<< wow... you can fix a chip post-fab? thats pretty amazing! >>



Yes, but unless you are talking about something with built in redundancy like cache it is not ordinarily done except during sampling as mentioned in the article.

 

[StandardCell]

<< I guess i'm just bitter because as usual the design boys get all the glory and manufacturing isn't even mentioned. You guys just ensure that you can make 1 die on silicon that functions and then you throw it onto manufacturing for us to work out all the problems and turn that 1 die into 100+ in order to make it a product that can make money for the company. What about the Q/A testing after fabrication? What about burn-in, sort, F/A, or any of the other tests manufacturing runs before sending the product to the customers? What about advances in processing like automation, the move to mini-environments, advanced feed forward/back process control, WIP management software, etc? >>



Hey, just so you know, I've spent a ton of time debugging test with my test engineers. I wasn't the kind to throw the test vectors over the wall. Whether it was a wafer sort problem or an emergency package assembly problem, I was there. When we had to microprobe a bunch of returned post-production customer samples, I was there too. Don't lump us all into the same lot, mate.



<<

<< wow... you can fix a chip post-fab? thats pretty amazing! >>



Yes, but unless you are talking about something with built in redundancy like cache it is not ordinarily done except during sampling as mentioned in the article. >>



There are also other tricks like bonus cells and gate array backfill stuff that they do to make changes or to change semi-hard parts of the design on the fly. Sometimes they only need to make metal mask changes, or only CAN make metal mask changes like we had to endure on one design where the program managers pulled the trigger early on TEN THOUSAND WAFERS thinking we were done when we had a flaky register file in the design and ended up having to underclock and raise the voltage.