PIII Coppermine and Heatsinks - quality of the thermal interface...

cautery

Senior member
Oct 9, 1999
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I just recently decided to upgrade a bunch of my processors to PIII Cu-Mine, and discovered some things for myself, that I thought you guys might benefit from...

The core on a Cu-Mine is nominally quoted as 8mm x 10mm which is a pretty small mating surface for a thermal interface (actually the measurement of the cores on my FC-PGAs was closer to 9.5mm x 11.25mm)

Getting a GOOD thermal interface requires that the mating surfaces be flat and smooth. (See my comments on surface quality in this thread: [l]http://forums.anandtech.com/messageview.cfm?catid=37&threadid=203557/l])

Besides that very small core size (soon to get smaller on the 0.13 die size), Intel has made achieving a GOOD thermal interface even tougher with the protective coating they chose to protect the core. Don't get me wrong, it wasn't some weird conspiracy by Intel, it's just that ANY time you put a coating on a surface, it will tend to degrade the flatness of the surface. In this case, since it was an "exterior" surface, the coating tends to be thicker in the middle than at the edges.... to my knowledge, that's just the way liquids behave. Thus, the core is NOT flat.

The generally accepted runout measurement for a GOOD thermal interface is 0.001"/inch (this is what Melcor and other industry leaders specify... I prefer an even tighter tolerance in critical junctions).

I measured the runout on one of my FC-PGA cores, and was astonished at the value.... actually not really, as I could see it was bad when test fitting a sink to the core. The difference in vertical height between the center of the core and the edge (with coating) was more than 0.002". Since the distance from the center of the core to the edge of the core is approximately 4.25mm, that equates to a runout of 0.002" x (25.4mm/4.25mm) = 0.0119"/inch.

Being "kind" about this measurement (and to allow for possible calibration errors in my equipment), I have been quoting the runout on this chip in my posts as 0.009"/inch which is STILL 900% of the "acceptable" value. That's bad.... In layman's terms, that means you can see daylight all the way around the edges of the core when mated (level) to a flat/smooth heatsink.

To make matters worse, the core size necessitates stabilizing "feet" on FC-PGA procs to keep the heatsink from "tipping" to one side thus further opening the gap on one side or the other.

Now the Intel spec sheet allows a relatively large tolerance in the core height above the substrate, thus making the height chosen for the "feet" on commercially available heatsinks only an APPROXIMATION of that needed to stabilize the processor properly. Add to that, the possibility of manufacturing/assembly tolerances in the "feet" on the heatsink, and you can see that you may well NOT be even getting "close" to the proper "foot" height for a given processor. Additionally, the material chosen for the stabilizing feet is also critical.... too soft, and they are worthless, too hard, and the feet could actually "lift" the HS off the core.

What I am getting to, is this.... As the wattage dissipated by the processor climbs, the core to heatsink interface quality becomes more and more critical. There are THREE things that YOU can do to easily improve this interface.... actually more than three, but I'll only address three:

Make the core FLAT....
Make the "feet" the correct height...
Make the heatsink mating surface flat....

These topics will be addressed in their own threads... so keep an eye out....

Have fun....