Pentium 4 w/ DDR will have horrible performance

[lifeguard1999]

Think about it a second. When the Brookdale chipset comes out for the Pentium 4, it will support only PC100 for SDRAM. The reason is that it fits in nicely with its 100 MHz bus clock. (Remember the bus runs at 100MHz, but is quad-pumped for the oft quoted 400 MHz bus speed.) The bandwidth will be 800 MB/sec

The same thing will happen for DDR. PC1600 runs at 100 MHz bus speed as well. It will give double the bandwidth of PC100 (1.6 Gbytes/sec).

But both of these are eclipsed by the dual channel Rambus solution that is currently available for the P4. It delivers 3.2 Gbytes/sec bandwidth.

If the 1.5 GHz Pentium 4 is having trouble competing with the 1 GHz Pentium 3, and 1.2 GHz Athlons, then it will certainly have even more trouble when its bandwidth to memory is reduced by SDRAM and DDR.

Not only that, but when DDR does become available for the Pentium 4, its clockspeed will be hovering around 2 GHz. The Athlon (Palamino) will be around 1.7~2.0 GHz. A P4 with SDRAM/DDR will be in even more trouble.

To solve the problem, Intel has several choices.

1. Address the P4 problems with its new 0.13 micron P4 later this year. We know this will happen. We do not know how much this will increase performance.

2. Have a dual channel DDR solution. This would at least give Rambus a run for the money. However, with such a high pin count (184 * 2), I do not think this will happen. That leaves Rambus as the only real solution for the P4.

My Opinion: Rambus the memory product is good. After all it is used in supercomputers. Rambus the company/lawfirm is bad.

 

[DevilsAdvocate]

Is the .13 Micron the Northwood? When are the .13 Micron P4's due out? Pardon my ignorance.

Also is there anyway Intel could work the Brookdale to require four PC100 DIMMS, and work the northbridge to "simulate quad-pumping?" by routing all data through the 4 DIMMS? I have no idea if this could be implemented, just curious if it was theoretically possible.

But I agree - Intel could be screwed - seriously.

 

[gogeeta13]

having a quad pumped ddr bus would entail, entering 10layer pcb land, while i havent been there, i hear its pretty bad

 

[Assimilator1]

hmmm ,nice ,but expensive with a capital E!:Q

BTW doesn't RDRAM still have rather high latencies?

 

[Fingers]

there is always 400 mhz (200 X 2) it's in our video cards. If this was seen as a viable option then video cards would go down in price as well, but I think a dual chanel ddr solution would be cheaper than incorporating 400 Mhz ram.