- Jan 20, 2011
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I just want to make sure I understand the relationship of the PCI-E 3.0 x16 slot, on an A320M-based motherboard, with regards to the CPU.
I'm going to post some facts as I know them. Please correct me if I'm wrong:
AMD 2200/2400G both have a total 16 PCI-E 3.0 lanes on each CPU.
Of those 16 PCI-E 3.0 lanes 8 are wholly dedicated to using a discrete graphics card. Or to be more specific, 8 PCI-E 3.0 lanes can be traced from the CPU to a physical PCI E 3.0 slot on a motherboard.
The Tricky Part where it gets somewhat confusing.
The motherboard manufacturer can make a decision here to either 1) map the 8 PCI-E 3.0 lanes coming from the CPU back to 16 PCI-E 3.0 lanes on the actual physical slot. But use PCI-E 2.0 protocols so that while 16 physical lanes are being used, they're operating at equivalent speed of 8 PCI-E 3.0 lanes...is that possible?
Or is it more likely that the physical motherboard slot (PCI-E 3.0 x16) is fully compliant, i.e., you "could" hook up 16 lanes but since the CPU only supports 8 lanes, were only going to put 8 lanes between the x16 slot and x8 CPU?
The reason I ask this question is because of how ASRock describes their PCI-E 3.0 slot on an A320M motherboard. As being PCI-E 3.0 x16 slot but operating in PCI-E 2.0 x16 mode.
"- 1 x PCI Express 3.0 x16 Slot (PCIE2: x16 mode)*"
The above description sounds to me like the physical slot is literally going to use 16 lanes in PCI-E 2.0 mode. If that is in fact true, does the transfer speed change when it hits the x8 lanes on the motherboard and go back at 3.0 speeds?
Or is the whole communication process between the CPU and the x16 motherboard slot negotiated from the very beginning to be the fastest speed of the slowest component?
I'm going to post some facts as I know them. Please correct me if I'm wrong:
AMD 2200/2400G both have a total 16 PCI-E 3.0 lanes on each CPU.
Of those 16 PCI-E 3.0 lanes 8 are wholly dedicated to using a discrete graphics card. Or to be more specific, 8 PCI-E 3.0 lanes can be traced from the CPU to a physical PCI E 3.0 slot on a motherboard.
The Tricky Part where it gets somewhat confusing.
The motherboard manufacturer can make a decision here to either 1) map the 8 PCI-E 3.0 lanes coming from the CPU back to 16 PCI-E 3.0 lanes on the actual physical slot. But use PCI-E 2.0 protocols so that while 16 physical lanes are being used, they're operating at equivalent speed of 8 PCI-E 3.0 lanes...is that possible?
Or is it more likely that the physical motherboard slot (PCI-E 3.0 x16) is fully compliant, i.e., you "could" hook up 16 lanes but since the CPU only supports 8 lanes, were only going to put 8 lanes between the x16 slot and x8 CPU?
The reason I ask this question is because of how ASRock describes their PCI-E 3.0 slot on an A320M motherboard. As being PCI-E 3.0 x16 slot but operating in PCI-E 2.0 x16 mode.
"- 1 x PCI Express 3.0 x16 Slot (PCIE2: x16 mode)*"
The above description sounds to me like the physical slot is literally going to use 16 lanes in PCI-E 2.0 mode. If that is in fact true, does the transfer speed change when it hits the x8 lanes on the motherboard and go back at 3.0 speeds?
Or is the whole communication process between the CPU and the x16 motherboard slot negotiated from the very beginning to be the fastest speed of the slowest component?