Paralell vs Serial memory, which will conquer the mainstream in the comming years?

[Sunner]

Just curious about what insiders around here think about this.

Seems like many technologies are moving towards serial interfaces in favour of the currently used paralell interfaces, except for memory.
Rambus seems like it had alot of promise, but it sure seems like it's doomed on the desktop.

However, that doesn't mean that the big companies out there can't design "Serial SDRAM" or whatever, but JEDEC doesn't really seem to be moving in this direction at all, with DDR-II and DDR-III slowly moving along.

So, what do the pros think about the long term viability of paralell memory?
5 years down the road? 10 years?

 

[glugglug]

Serial Memory?!?!?!??!?! ROFLMAO!!

OK, seriously though:

Serial interfaces to RAM will NEVER occur in server-class machines. NEVER EVER EVER. Even 100 years from now that will still be parallel (in fact the bus will just get wider than the 64-bits commonly used today).

I don't forsee even the low end (sub-$700) vomit boxes making such a huge performance sacrifice to save a few pennies in the coming decade.

The one place you might see a serial memory interface used is in embedded devices, like say your wristwatch.

 

[Shalmanese]

Care to back up that statement with some facts glug?

Perosnally, I think that in a perfect world (TM) we should be moving steadily on the path towards Serial memory right now as we have done for Serial ATA but, because of Rambus, nobody dares try do any research in Serial RAM for fear of litigation.

 

[Sunner]

Originally posted by: glugglug
Serial Memory?!?!?!??!?! ROFLMAO!!

OK, seriously though:

Serial interfaces to RAM will NEVER occur in server-class machines. NEVER EVER EVER. Even 100 years from now that will still be parallel (in fact the bus will just get wider than the 64-bits commonly used today).

I don't forsee even the low end (sub-$700) vomit boxes making such a huge performance sacrifice to save a few pennies in the coming decade.

The one place you might see a serial memory interface used is in embedded devices, like say your wristwatch.

Uhh, sacrifice performance?
You do realize that the currently most powerful mainstream computers you can get your hands on use RDRAM, right?

 

[Peacekeeper100]

Well I think there are two ways to look at this. Parallel could actually be faster if it is designed right, but this is extreamly difficult. Serial is easier to work with since you can use a smaller bus, but to get the same bandwidth you need to pump up the clock, which again creates problems down the road. It's not to hard to switch to serial in hard drives because they are only transfering at 150MB/s right now, at least in the case of Serial ATA. Memory is in the GB/s and that means the memory is going to be harder to create, which means it is more expensive. If they started making cheap memory running at 3Ghz like the processor then serial would work for many years down the road, but speed cost money. So I guess I am saying serial will be king in servers where money isn't important, but on desktops parallel with be the choice since it does not have to run at such a high clock speed.

 

[Sunner]

Well, Im no architect, but I believe cost is a big factor in keeping more expensive memory technologies out of servers really, simply cause most servers have so much memory.
Say a SunFire 15K, at most you can load them with 768 GB of memory, now if one memory technology costs $1.000 more per GB that might not make a huge difference when buying a server with 1 GB of RAM, but $768.000 is significant enough to make a difference.

But like I said, Im no architect, so Im curious on a more technical basis, will serial memory be more technically as well as economically viable in the long term than paralell, or the other way around?

 

[Agent004]

Actually, if you look at history, I believe we started with serial memory, then advanced to parallel as an evolution. This is precisely what we are seeing how Rambus is going, moving from serial to parallel (or they are planning to, if they survive, that is).

So I believe the next (r)evolutioary memory in coming years would be serial memories.

 

[VirtualLarry]

Originally posted by: Agent004
Actually, if you look at history, I believe we started with serial memory, then advanced to parallel as an evolution. This is precisely what we are seeing how Rambus is going, moving from serial to parallel (or they are planning to, if they survive, that is).

So I believe the next (r)evolutioary memory in coming years would be serial memories.

The interesting thing is, if you look at high-speed interconnect buses, such as HyperTransport and SiS's MuTOL link, they are going towards a higher-speed, lower-pin-count bus. I think part of the reason, is that as clock frequencies increase, the issues of routing and clock skew between the various signals within a "wide bus" gets worse and worse. So the motivation behind both Hypertransport and Serial-ATA is similar. I could see future chipsets implementing a "hub" sort of idea, much like Intel's newest chipsets, with various banks of memory that utilize standard "parallel" memory interfaces, but are linked to the chipset via high-speed serial (or at least narrow parallel) interfaces. This is also a more feasable plan, given Intel's current processor bus interface protocol that allows multiple outstanding memory transactions in-flight at any given time (IOQ depth setting in some BIOSes). The chipset could have multiple high-speed serial connections to different memory banks, and route different memory transactions to them simultanously. (Supposedly the crossbar memory controller on nVIDIA's nForce chipsets works that way.)

 

[glugglug]

Rambus isn't completely serial. It's a narrower memory channel coming out of each RIMM (so you have to either use them in sets or quad-pump them) but NOT close to serial. And the interface between memory and CPU is still 64 bits wide even with RDRAM.

In order to get even PC2100 transfer rates with a SERIAL memory interface, the data bus would have to be clocked at 21 GHz (assuming 2 parity/start/stop bits per byte like Serial ATA; no, there is no decimal point missing - even with a large scale ECC mechanism to virtually eliminate parity overhead you are still talking about a theoretical minimum 16.8GHz bus for just PC2100 bandwidth)

A 21GHz bus is unpractical for obvious reasons. As applications become more bandwidth demanding this situation will only get worse. In order to move to a SERIAL interface (saving $$ on trace lines/pins/etc) without going to such extreme bus clocks you have to sacrifice bandwidth, which is why it would be a low-end-only idea.