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P4 will scream at RC5

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amd is in a better position to move to .13 than
intel is. most of their equipment is able to do .13.
(just the masks and stuff i think need to be replaced)
intel has to spend a lot of money on replacing many machines.

the reason amd is not going to .13 now is they really dont need to.
they already have the fastest and the cheapest.
the german plant is not up to full
production. (currently at around 50%)
intel has to go to .13 next year because they will not
be able to get any more speed out of their p3 until they do and
that is their volume chip prob till the end of 2002.
look at the die size of the p4. even when they go to .13 with
that it will still be big.

i think that by the time sse2 is very common it will also
be available on amd chips.

the current p4 is not meant to sell in huge numbers.
intel has to start somewhere. whenever you change that much
you will not have a very cost effective solution.
when it comes to ddr on the p4 that will help but ddr on
a p3 will not help as much as it does the p4 and the athlon,
because the p3 still only has a 133mhz bus.

for amd when you combine copper, soi, low-k, and the .13 process
it will really be something (plus they have several more
interconnect layers than intel) and if they
use pure silicon they will be able to push
their chips quite a bit
(remember amd is in with motorola)

things are changing so much faster now because of amd's threat
to intel that no matter which side you are on it is great.
it is forcing intel to lower prices and come out with
faster products.

 
silverback, did you see what altivec did for G4 speeds? Very fast. And P3 is moving to 200MHz bus .13 process next year.
 
What remains to be seen is how long it takes dnet to release a p4 core, and then how long it takes to release a sse2 core.

I have a feeling that the first p4 core or two will have modest (~10%) improvements while the programmers are still figuring out the nuances of the chip. After that they will turn their attention to bitslicing and we could see a huge increase. Or we might not.
 
Intel already has .13 process down, and should have the P4's and P3's in mass production at that size very soon. AMD is still at least a year away from having chips out at .13
 
SS59, I think that you are a little misguided on the brach misprediction performance hit. From Aceshardware:



<< Notice that the branch check is at the 19th cycle, and therefore the branch misprediction penalty is no less than 19 cycles! If an instruction is not the in the Trace cache, the penalty could be even worse (context switches). Luckily, Intel has implemented an excellent branch predictor, which should be better than any existent branch predictor today to minimize the impact of branch misprediction. There is also a bypass between the decoder and the rename/allocate unit, which should lower the performance decrease caused by trace cache (L1- Instruction cache) misses. >>



In my opinion. If the P4 core was able to use SSE2 (which a lot of you seem to believe, so it will probably be the case) then the performance could be pretty good (don't expect it to rival a G4 on a per clock basis as the latencies will be much higher in the P4). However if the cores are unable to use SSE2 the the performance outlook is pretty bleak.
 
amd will not go to .13 because they
can still get more speed out of .18.

remember amd has more advanced manufact technology than intel.
intel has never made a copper cpu.
add to that low-k , soi and a few other technno tricks.

the machines that they bought for the germany plant are all
current while intel has like 5 plants that need to have
many more machines replaced. when amd goes to .13
it will cost them far less because they do not
have to replace most of the line just a couple of machines.

one thing you have to think about is there is no reason to
jump to the next die size if you can get more out of your
current production process. whenever you switch die
sizes it takes awhile to get the yields up.

intel is not just fighting amd, they are fighting
amd and motorola when it comes to production technology.
 
The P4: My 2cent worth...

For the average user (not us Geeks 🙂) who goes to Best Buys and picks up a P4 after 3.5 years with a P166, they will have there socks blow off!!! They will never notice that their Word Proccessor is not as fast as it would be on an Athlon 1.2 GHz. I doubt that WE could notice it! We can measure it, but it is not noticable! Maybe you don't remember that the PPro was not as fast as Pentium on 16bit software, even with it's huge cache. But, once they upped the MHz rating and called it a PII, no one ever noticed.

Intel has to get the P4 into use for Software developers to be able/willing to do the optimization that Power User will demand. They can't wait for the software, to release the HW. HW has always been ahead of SW!

We may just find that The P4 was the whole reason for RAMBUS' existance. Maybe Intel's mistake was trying to put into use with the PIII. There is not doubt that the memory performance of the P4 with RAMBUS makes us all a bit jealous!
 
Actually, it wasn't the P3 per say that didn't work well with Rambus. It was intel's bus design. While they would never do it (the P3 would probably look better than the P4 in almost every application 😉), using the P4's bus architecture (or slight variant) would probably significantly improve its memory performance when using RDRAM.
 
RC5 uses very few commands, and since the Trace cache is so large it can easily fit into it, seeing as it does in the P6 and athlons cores.
 
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