P4 FSB = 400, 533, 800MHz? Can someone explain to me how they get this in detail?

[Whitedog]

I've never fully understood how they determine the FSB on the P4 platform. I never really gave a rats ars to tell the truth, but I'm a little puzzled by it.

I got it like this when the P4 first came out.

100MHz memory bus (using 600-800mhz RDRAM???)
Quad Pumped 400MHz FSB (whatever the F%#* that means...)

Now they have 533MHz FSB... I take this as Quad Pumped 133MHz bus? and the 800MHz FSB will be like 4x200MHz bus (DDR400)

I don't understand the "quad pumped" part I guess... (don't quote me on that, it's a term I heard at other sites before)

I do understand how AMD uses the "rising and falling of the clock cycle" on the FSB to get effectively double the amount (same theory as DDR)

Thanks in advance.

 

[Lord Evermore]

Quad-pumped is just "quad data rate". Quad-pumped sounds cooler in marketing though, and makes people think it's something special. It essentially "pulses" 4 bits for every single cycle of the memory. Twice on the rise, twice on the fall. Sort of like analog modems now. They actually only have a 9600 cycle per second signal, but data is sent at several bits per cycle.

RDRAM is actually octuple data rate.

I'm not sure if Intel has specifically said how they'll do the 800MHz bus. One previous thread here had someone speculating it might be dual 400MHz busses, but that was just a guess and a way to explain how they might easily deal with signal problems at high speeds.

I don't know how to explain exactly how "quad data rate" works in this case. I'm not an electrical engineer, so I don't know exactly how a signal is modified to send 2 bits on each side.

 

[microAmp]

I don't understand the "quad pumped" part I guess... (don't quote me on that, it's a term I heard at other sites before)

I do understand how AMD uses the "rising and falling of the clock cycle" on the FSB to get effectively double the amount (same theory as DDR)

With the "quad pumped", it works like AMD's but sends 2 signals on the rise and 2 signals on the down clock.

 

[Whitedog]

I see... 2 bits per half cycle... That makes sense, though I don't see how they do that either. I'm glad I'm just a programmer and not an engineer.

My guess is they will have the bus speed up to 200MHz (can we say HS/Fan for the Chipset? I hear yes) and running 2bits/half cycle they'll come up with the "so called" 800MHz bus.
Using the dual channel DDR400 for memory will give them the "effective" memory bus of 800MHz...

Don't you just LOVE how they are manipulating the numbers to make people "believe" the bus speed is actually "800MHz"?? I think it's disgusting.

I guess my next question should be.... If INTEL can send 2 bits of per half cycle, why can't AMD? Right now, it looks so much better for INTEL since they can say "We have 533MHz FSB" whereas AMD can only say "We have 333MHz FSB" Of course "We know"...... but the masses only see 533 and 333.

I tell you, it's getting harder and harder to keep up on the "basic understanding" of PC's... It's pretty sad that I have to explain to our techs here at work how computers actually work... :frown: (I used to be the lead tech before switching over to the Dark Side, as they put it )

Just wait a couple of years... we'll see stuff like this.
The New Intel 20GHz POS Wingnut Commander Computer with XDH Technology!!!!
In actuality it would be something like an (((Extra-Dual-Hyperthread 8GHz CPU" with 400MHz memory Quad Pumped Running backwards for extra bandwidth with an overclocked floppy drive))) giving you the "effecting" computer power of 20GHz???... *sigh*
Who would even know... all the public knows is they are letting a 20GHz computer. lmao.

 

[Lord Evermore]

It's been like this for years, it'll continue like this for years.

AMD was the first one with a DDR frontside bus, remember. For a time they were able to claim a 200MHz FSB while Intel only had 133MHz. Plus, remember how long it took for Intel to admit that faster bus speeds were useful and increase theirs? And AMD is just as guilty of using "effective" numbers as Intel, and memory is just as bad. It was debated years ago whether it was an unethical marketing scheme. Heck, I liked AMD and I didn't like it when they started calling it a 200MHz bus.

But it's a reality now, and it does make sense. However describing it as a "533MHz quad-pumped" bus or 333MHz double-pumped bus is a little less informational and accurate than "133MHz quad-pumped" or whatever. Describing it as quad-pumped is sort of redundant.

People still call 56K modems "56,000 baud" when they're not though. As long as the meaning gets through, that's what's important. Let the tech-geeks worry about what's actually happening, all the consumer cares about is how many bits they're going to have processed/transferred.

 

[SexyK]

I don't understand why people think Intel is full of it for claiming a 533MHz bus. I mean, there is ostensibly no difference between a 533MHz bus and a 4x133MHz bus. Maybe the technology is different, but they both get the same amount of work done in the same time. Maybe you would be happy if Intel didn't bother with "innovating" or "R&D" because they are just fleecing us with it anyway

. It's not like Joe Blow Computer Buys would understand what a quad-data rate 133MHz bus meant, I mean, you didn't even understand it coming into this thread! Intel has a technology that is effectivly a 533MHz front side bus, whats the big problem with calling it that?

Kramer

 

[Lord Evermore]

Well, the "big deal" is that technically it's not a 533MHz bus, nor does AMD have a 333MHz bus. They have "effectively" those speeds, but physically, they're only a 133MHz or 166MHz bus. Just like a 56K modem is NOT a 56,000 baud modem, but it does transfer (theoretically) 56,000 bits per second. An Intel bus is electrically cycling at only 133 million cycles per second (give or take a few hundred thousand). It modifies the cycles so that it achieves 533 million bit pulses per second. But if they called it a 533Mbps (or 4.2GBps with the bus width considered, or 34Gbps, or used real binary to advertise bandwidth) bus, no general consumer would have a clue what it meant. Same with AMD's bus speeds.

It's just a matter of people being anal about things (myself included). It's a moot point now, everyone has given in and accepts that high numbers for speed are worshipped and marketers will do anything they can to make their numbers seem higher than the competition.

 

[element]

Basically what is hapeneing is companies realize the stupidity of the avg consumer, and have to dumb terms down for them. They realized that 533 mhz sounded better for selling than 133x4, and that they could get away with calling it that because it is effectively the same amount of data sent per unit second.

Too bad they couldn't call it what it really is without confusing people.

Similar to AMD's PR rating IMHO.

I still think they should all market speed based on number of instructions or calculations per second. like MFLOPS or MIPS. It should be information offered in addition to the clock speed though.

 

[highwire]

Yeh - the "quad pumped" obsurata from Intel bugged me a bit, too. So, I looked into it a few months ago and posted a little blurb then.

This is the good news: Quad pumped is just BINARY CODING - period. No phases, no vector maps, just binary coding. Timing reference is provided every 4th cycle. Also, to keep power needs down, the signal voltage is reduced considerably.

A stream of 1's would just be a steady high voltage; 0'swould be a steady low voltage on a bit position.

In the case of alternating 1's and 0's on a 200mhz quad pumped bit position, there will be a voltage transition every bit. So, on a scope it will look like a 400mhz square wave. Binary.

Ron

 

[MadRat]

Intel used to call the 3X clock multiplier by "4X" and nobody complained. The 486dx4/100 was a triple-clock on a 33MHz bus, not a quadruple-clock 25MHz bus. The Intel 486dx4/75 had a triple-clock on a 25MHz bus. Prior to that Intel did name their 486dx2/66 correctly because it was a double-clocked processor on a 33MHz bus. IBM had a 486dx3/75 which was an actual triple-clock on a 25MHz bus. Why IBM would use a name that was truthful and Intel would not was purely marketing preference. Guess who won.

 

[Whitedog]

Why IBM would use a name that was truthful and Intel would not was purely marketing preference. Guess who won.

Neither in my book... I used a DX2-80 from AMD in those days. It kicked ass.

Hey highwire, that's good info.. Thanks! Thanks to everyone else too.. I kind of had a clue, but wasn't sure how intel was doing the bus speed calcs...
<<It essentially "pulses" 4 bits for every single cycle of the memory. Twice on the rise, twice on the fall.>>

I wonder how long it will be before Intel starts claiming their H-T CPU's at a higher clockrate than they actually are. What would stop them? AMD is doing it and getting away with it without complaint (well, not too much anyway).

Do you think Intel would stoop to that if the hammers come out and start kicking their ass?

 

[MadRat]

Originally posted by: Whitedog
Neither in my book... I used a DX2-80 from AMD in those days. It kicked ass.

Awww, and I did video editing on Intels 486dx50, not the 486dx2/50.

 

[Kowan]

Basically what is hapeneing is companies realize the stupidity of the avg consumer

Anyone else find this to be funny in response to a question asked here?

 

[Whitedog]

Yea Kowan, but I refuse to take offense to that though... as I'm not what he was referring to. I think he was referring to those who actually believe these computers "will have" an 800MHz bus... My question was mearly how are they calculating it.

 

[Bleep]

Maybe I am confused here but clock cycles inside the CPU can be any multipule of the FSB which is the input frequency to the CPU itself, frequency multiplying is not a difficult thing to do except when you get into really high frequencies, a limiting factor is the length of the connections inside the CPU. Once the connection length approaches 1/4 wave length and becomes resonant with the frequency involved along with the capactinance will start to effectively become a transmitter and then will generate all kinds of problems. That is why the faster the chip becomes the smaller it has to be because of the length of the connections must be extemly short. In fact 1/8 wavelength will resonate.

Bleep

 

[SexyK]

I think you guys are being waaay to hard on Intel (and AMD i guess) on this issue. If you discovered a hard disk technology that let you store 2 bits of information for every single hardware bit, would you call it a 2x100GB drive or a 200GB drive? Sure, maybe there aren't really 200GB's of physical storage space there, but your new technology has made it ostensibly the same thing. You would call it a 200GB drive because when you put it into a computer, it reads as 200GB! Its exactly the same as the "533MHz" bus. Sure, physically it's only 133MHz, but it's exactly equivalent to what a 533MHz bus would be, so whats the big deal? Cut them some slack, they're making great products and trying to have a wide audience understand their breakthroughs, not bilking people of money.

Kramer

 

[Whitedog]

I really didn't mean this thread to be a "Flame them Intel %astards because they are deceiving the World with Fake clock speeds!!! :|"

I was really just wanting to understand "How" they were calculating it. But no, we're Not being too hard on them... because they ARE Deceiving &astards! Giving us Fake clockspeeds!!! :|

Of course you know I'm just kidding...

 

[SexyK]

Originally posted by: Whitedog
I really didn't mean this thread to be a "Flame them Intel %astards because they are deceiving the World with Fake clock speeds!!! :|"

I was really just wanting to understand "How" they were calculating it. But no, we're Not being too hard on them... because they ARE Deceiving &astards! Giving us Fake clockspeeds!!! :|

Of course you know I'm just kidding...

Oh, I know, just always seems like people are gunning for Intel, and it's not really fair considering what they've done for the industry. I can see people debating IPC and clock speed, but this issue seems cut and dry to me. They aren't advertising anything falsely here, it delivers what it claims, so i don't see the problem. Take care.

Kramer

 

[Lord Evermore]

SexyK: there is a difference. A hard drive that can store 2bits for every physical bit is still storing 2bits. A drive with 100GB physically and able to store 200GB "virtually" or whatever it might be called, would still be giving you an actual storage space of 200GB. A bus that runs physically at 133MHz and transfers 4 times per clock is NOT running at 533MHz; calling it 533MHz may not be deceptive, but it is inaccurate. It is still a 133MHz bus with an effective throughput equivalent to a 533MHz bus, but it's not 533MHz. Now, if that hard drive's "virtual" double-storage space only worked if you didn't turn off the power, then calling it 200GB would be deceptive, but not technically inaccurate, just with caveats.

 

[SexyK]

Originally posted by: Lord Evermore
SexyK: there is a difference. A hard drive that can store 2bits for every physical bit is still storing 2bits. A drive with 100GB physically and able to store 200GB "virtually" or whatever it might be called, would still be giving you an actual storage space of 200GB. A bus that runs physically at 133MHz and transfers 4 times per clock is NOT running at 533MHz.

You have proven my point: the hard disk would still be giving an actual storage space of 200GB and the bus is still giving the throughput of a 533MHz bus. Where's the difference?

Kramer

 

[BigToque]

why does it matter if your sending 1bit @ 533 or 4@ 133? Either way gets the same results.

Intel figured how to send 4 bits at once. Now once the "TRUE FSB" hits 533, they will be able to do the ammount of work that a 2.13GHz FSB could do.

 

[Lord Evermore]

"hertz" is a word indicating the number of times the voltage cycles every second. Modulation of the voltage to allow 4 data transfers for every cycle on a 133MHz bus does not make it a 533MHz bus. It only makes it the equivalent of a 533MHz bus. It is still technically and physically and electrically operating at only 133MHz. As I've said, it's only a technical misnomer, and not necessarily deceptive, but it is inaccurate, and for someone who prefers accurate terms used and prefers for people to be educated rather than having things dumbed down for them, it's rather erksome.

 

[MadRat]

If engineers had to measure exactly the performance of the bus, say like a car manufacturer measures horsepower of its engine, then we'd be talking about peak transfers. Talking about peak transfers would be just as confusing as talking about theoretical transfers.