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Output impedance of 74xx logic?

f95toli

Golden Member
I am currenty designing a circuit which uses a 74LS07 hex buffer/driver in the output stage. I would like to be to be able connect this output to among other things a counter with a 50 ohm input impedance using ordinary 50 ohm coax, hence preferably I would like to have 50 ohm output impedance.

My problem is that I can't figure out how to do this. 74LSxx logic does not seem to have a well-defined output impedance and it alse seems to depend on the state of the output.
I assume what I am trying to do can be done using one or two resistors but I can't figure out how to calculate their values.

Is there a good "rule of thumb"?



 
I don't know that there is a good generic output impedance to assume for any arbitrary 74LSxx device. You may find the datasheet (with reference schematic) for the TI version of that output buffer/driver family useful.
 
Depending on the speed of your circuit it may not matter much...

Take an LS logic chip, drive a 50 ohm resistor, and measure its output voltage. That'll tell for sure.
 
74XXX series means TTL or MOSFET logic to me. So I do not think you can really give the device a characteristic output impedance. Basically though, as long as you are not driving a high frequency clock, then impedance matching is not going to be a concern for you.
 
Usually the output impedance is defined in terms of how many TTL inputs it can drive in the "fanout". It varies from chip to chip. Look at the respective data sheets. I would think that to drive a 50ohm cable you could use a buffer designed for that purpose.
 
Aluvus: I have already looked but I can't find the information I need.

Bobsmith1492: That doesn't work, as Born2wire pointed out the problem is that it is state-dependent meaning a "steady-state" measurement won't tell me much.

Born2wire: The problem is that I want to measure the time between two pulses with high accuracy (a few ns) meaning I want to minimize the rise-time of the pulses (I am assuming that reducing the rise-time will also reduce the jitter). The rise-time of an 74ls07 is about 6 ns meaning I need a large bandwith (ideally 500 MHz, but lets say 100 MHz).

dkozlovski: Can you suggest a buffer? I have looked but I can't seem to find anything. I would be happy to replace the 74ls07 with something else (the only reason I used it is because I have used in in the past and the specs looks good), all I want is to interface some TTL logic with 50 Ohm measurement equipment.
All I have us line drivers for 75 Ohm video but that is not what I want.
I could of course just use a high-bandwith video op-amp on teh output but surely there must be some better solution?

 
Originally posted by: f95toli
I would like to be to be able connect this output to among other things a counter with a 50 ohm input impedance using ordinary 50 ohm coax, hence preferably I would like to have 50 ohm output impedance.
Why?!

You do not need to match the output impedance of your logic gate to the cable neither to the 50-Ohm load.
The mismatch will result in ringing at every transition at the output of the gate. But, TTL has enough noise-margin to not be affected by the ringing.
 
Yes, I know that. I use a lot of microwave equipment at work (network analyzers, various pulse generators, generators etc up to 60 GHz) so I understand the problem. However, I don't have much experience when it comes to building digital electronics which is why I keep running into various problems.

The counter is a Stanford Research SR620 (http://www.thinksrs.com/products/SR620.htm) that we are using for time-of-flight measurements; i.e. we measure the time between a start and a stop pulse; the latter being generated by a comparator (which I have already built) and the start pulse is generated by a digital delay/pulse generator. The pulses are sent via fiber optics (as you might have guess this is work related).

The part I am working on at the moment is the fiberoptic transciever (the reciever will be connected to the counter and a few other things, all 50 Ohm) and I am basically "learning-by-doing". Later I will integrate everything on the same PCB but at the moment I am building small prototypes of the various parts.
My goal is simply to minimize the jitter in the transciever and as far as I understand that means that I should try keep the rise time of the pulses as short as possible and try to avoid ringing.

Btw, I would say it is an RF problem. As far as I know the rule-of-thumb for bandwidth calculations when transmitting pulses is that you multiply 1/(rise time) by 3; hence 6 ns translates into 500 MHz which means that I need to worry about the impedance.

But back to the original question: Isn't there a simple, straightforward, way to connect TTL logic to a 50 Ohm line?

 
If you want to make the output impedance of the source (your TTL logic) to be 50 Ohms, it may be easiest to use a gate with an open-collector output and use a 50-Ohm pull-up resistor. Then, the impedance will be 50-Ohms and reasonably independent of whether you are sending a logic 1 or 0.

You definitely have to worry about ringing for a critical application. But, who said that TTL was the best logic for this?

I just tried to give some information based on the limited amount of data I had about your project.
If you are dealing with high-frequency logic, you are better off using ECL or CML logic (instead of TTL), both differential and much more immune to noise (jitter).
 
The 74ls07 does have an open collector output (at the moment I am just using 1kOhms just for testing) but as far I understand the minimum value of the resistor is determined by the amount of current the 74ls07 can sink (40 mA) which limits the value of the resistor to about 100 Ohms.

I have considered using faster logic. However, I guess I should try to master the basics of using TTL logic before moving on to something even more complicted. However, I guess I could just use an ECL driver to drive the coax.

Anyway, thanks for your help. I must admitt I had not even considered changing the value of the pull up resistor.



 
You can place multiple open-collector gates in parallel as long as their inputs are also connected together, there should be no problem. Then, you have control over the overall output current drive and minimum pull-up resistor value.
 
Originally posted by: f95toli
I have considered using faster logic. However, I guess I should try to master the basics of using TTL logic before moving on to something even more complicted. However, I guess I could just use an ECL driver to drive the coax.

ECL is a differential logic. You cannot use coax for it. At least not just one coax cable!
If you use only one side (single-ended), you will only have the disadvantage of ECL (lower swing) and not its advantage (differential).
 
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