NYTimes article on Asychronous CPU design

[pm]

Kinda interesting article at nytimes.com on designing asynchronous (clockless) CPU's. Very general and completely avoid implementation details (and, with asynchronous design, the details are everything). Still, you guys might enjoy it. Link is here

Edit: note that registration w/ NYTimes is required to read the article.

One interesting quote:


<< He notes that in a complicated modern computer chip as much as 15 percent of the circuitry is devoted to distributing the clock signal and as much as 20 percent of the power is consumed by the clock. >>


At ISSCC this year the Power4 lead program manager was quoted as stating that clock distribution, buffering and driving the clock inputs to latches on the Power4 (which uses a grid rather than a balanced H-tree and doesn't use clock gating at all) requires 70% of the total chip power.

 

[PentiumIV]

I do not think it is a wise idea not to use clock gating
It is a tremendous power waste. The only excuse for doing so
is to simplify the design.IMHO, this may only be considered for
the supercomputer CPUs, where cost of cooling is no object. On
smaller processes excessive power density might just burn the CPU,
and no heatsink would help. Perhaps only liquid nitrogen

Power is one of the most important problems of the CPU design....