Nvidia, TSMC roll 65-nm embedded DRAM

[LittleNemoNES]

http://www.eetimes.com/news/semi/showAr...1D0QMZUCQSNDLSCKHA?articleID=197800409

Can someone decode this for me...it's late and has a lot of pc-babble.

 

[Gstanfor]

They are basically saying nvidia is the first company to use an embedded DRAM process designed by TSMC at the 65nm manufacturing node. They go on to state that this dram design has shrunk by 50% on 65nm compared to 90 or 80nm.

They explain that the embedded dram is useful for letting chips that use it impliment power saving measures more easily.

They state that the particular 65nm process they are using (there are usually several "recipes" per process node) uses 10 metal (wiring) layers, the metal in question being copper and it is a Low-K process also.

TSMC started manufacturing logic based on this embedded dram on the 65nm process in the 2nd quarter of 2006. They started manufacturing logic based on the 90nm version in the 1st quarter of 2006.

 

[TanisHalfElven]

Originally posted by: Gstanfor
They are basically saying nvidia is the first company to use an embedded DRAM process designed by TSMC at the 65nm manufacturing node. They go on to state that this dram design has shrunk by 50% on 65nm compared to 90 or 80nm.

They explain that the embedded dram is useful for letting chips that use it impliment power saving measures more easily.

They state that the particular 65nm process they are using (there are usually several "recipes" per process node) uses 10 metal (wiring) layers, the metal in question being copper and it is a Low-K process also.

TSMC started manufacturing logic based on this embedded dram on the 65nm process in the 2nd quarter of 2006. They started manufacturing logic based on the 90nm version in the 1st quarter of 2006.

doesn't goingto a new node require lot a changes to the machines ? go to so much trouble for just 1 quarter.

ps. this is a question from a persone who knows little about this stuff.

 

[Gstanfor]

They are going to the 65nm node anyway. Lots of new designs get trialled on an older or current node, then see actual commercial production on a newer node.

 

[Wreckage]

PSP2

 

[JPB]

http://www.theinquirer.net/default.aspx?article=38050



BACK IN 1998, a certain Finnish company named BitBoys Oy announced its "revolutionary" 3D GPU, which was based around 11MB of eDRAM memory for the internal buffer.

Its manufacturing partner was Infineon, but after the German company cancelled the production, the Finnish company ended up with a stillborn product.

TSMC recently announced that it has begun production of eDRAM (embedded DRAM) using a 65 nanometre process and Nvidia was the first company to get the part. TSMC describes 65nm eDRAM as a 10 layer copper part with low-k interconnects, while cell and macro size shrink between 45-50% compared to 90nm.

But this is not the only advantage that 65nm process brings to the table. EDRAM also features power-saving features like power-segmentation, sleep mode, on-die temperature monitoring, and equalising loads.

EDRAM is expected to be used heavily in next-generation graphics processors in desktops (given the future nature of decoupled GPUs), mobiles, handhelds, and consoles. The use of eDRAM does not stop with graphics, since high-end network switches can also efficiently use it.

Now, here is the kicker part: the reason why eDRAM was touted as the ideal solution for chips is its size ? when compared to more common memory types used as cache (SRAM), eDRAM takes less than a quarter of the space for the same density. µ

 

[chizow]

Originally posted by: tanishalfelven
doesn't goingto a new node require lot a changes to the machines ? go to so much trouble for just 1 quarter.

ps. this is a question from a persone who knows little about this stuff.

All fabs aren't updated at the same time, so there's always going to be fabs running older nodes to meet current production needs. Since eDRAM is a relatively new tech, the 1Q difference wouldn't necessarily reflect the time it takes to ramp up on the new process. Specs could very easily need to be re-engineered and re-taped for the smaller process.

 

[Gstanfor]

Unless G81 has recently taped out at TSMC, my guess would be that this embedded dram would be used by nvidia in their northbridges (more caching room for their DASP) or in a GPGPU version of G80 (perhaps as an L3 style cache).

 

[chizow]

Originally posted by: Gstanfor
Unless G81 has recently taped out at TSMC, my guess would be that this embedded dram would be used by nvidia in their northbridges (more caching room for their DASP) or in a GPGPU version of G80 (perhaps as an L3 style cache).

Very possible. NV did mention integrated G8X graphics in Q3 I believe, contributing to their 50% expected revenue stream from G8X parts in Q3 and Q4. eDRAM would be perfect for an integrated graphics solution.

I think G81 is still a bit off. Pretty sure the latest leaked specs/roadmaps show the 8900 series continuing the G80 designation on a smaller process. G81 would then start a new product cycle and open up the possibility of architectural changes and enhancements, like eDRAM. If the 8900 came sometime in Q2-Q3 that would allow G81 to debut sometime in Q4.