No NV30 Benchmarks ***CONFIRMED***

[merlocka]

There will be no NV30 benchmarks until November, and that's if God himself has blessed the wafers.

If you see a thread with benchmarks from some site (which requires babelfish to read) that show Quake3 1600x1200 4xFSAA 16AF @ 247 FPS, back slowly away from the monitor. Take a deep breath. Realize that nVidia engineers are all on vacation now, awaiting the first shipment of parts from TSMC. After that, Jen Sun <sp?> will force them to work UNGODLY hours bringing the part up and getting the driver bugs worked out.

Who knows, they might have to FIB a few parts or bring up some wafers they left at metal. Or they might get it right the first try (which is amazing, really amazing).

Either way, just read the R300 reviews, it's really fast. December is coming, but not that soon.

 

[MournSanity]

I really think that it won't come out this year at all. A January 2003 release is what I'm predicting.

 

[klah]

I posted the Czech site where those graphs originated from. They are simply projections based on the statements in the article here: ReactorCritical.com from August 5 which stated that:

• In Quake III Arena in 1280x1024 with 4x FSAA enabled, NV30 is going to be 2.5 times faster than the GeForce4 Ti4600.

• NV30 will score three times more than the GeForce4 Ti4600 in 3D Mark 2001.

• As for pixel-shading speed, it will be 4 times of the NV25.

If anyone could read Czech we would have seen that they simply took these three "facts" and made graphs for them.

 

[merlocka]

"Performance Estimates" and benchmarks are two very different things. Parhelia taught many people that lesson...

 

[Uttar]

Originally posted by: merlocka
Realize that nVidia engineers are all on vacation now, awaiting the first shipment of parts from TSMC.

I think you do not know exactly how vacations work at nVidia:

Paid Time Off: If you join NVIDIA, you'll accrue 15 "PTO" days during your first year of employment. That's 3 weeks with which you can do whatever suits your needs. For each additional year that you're with the Company, you will accrue an additional day, up to a maximum annual allotment of 20 days.

And, for those employees who want to save up for that long-awaited summer vacation or some other major event, NVIDIA allows employees to accrue up to 35 days of PTO. In addition, for those employees who stop accruing because they hit the maximum accrual, NVIDIA also allows employees to "sell" some of their PTO.


Uttar

 

[Saist]

Uttar, I think you taking him too literally here.

I do not think Merlocka (whose been here in these forums at least 3 years) meant that Nvidia engineers were actually on a "paid" vacation. And since you copied this quote

" Realize that nVidia engineers are all on vacation now, awaiting the first shipment of parts from TSMC"

surely you must realize that it has been less than 2 weeks (more like around 7, 8 days by now) since TSMC actually taped out the first real Nv30 silicon. As I posted in another forums, there is simply no way that final silicon would be out in testers hands at this stage, generally given that there is 90 days between tape out and final silicon. On top of the known problems TSMC is having going to .13 processing (relaibly).

I think what Merlocka meant is that Nvidia engineers are having to wait on TSMC to get its act together. a thought echoed again hypersonic5 who lays bets on January.

I'm not sure if your post was supposed to be a joke or not... but if it was, it's a rather bad joke.

 

[merlocka]

I think you do not know exactly how vacations work at nVidia:

LOL, thanks for the clarification from nVidia HR

The point is... once the chip tapes out all the system engineers have nothing much to do until parts come back. Traditionally, it's when most of the chip designers bolt for a week or so.

 

[Rand]

Originally posted by: Saist
surely you must realize that it has been less than 2 weeks (more like around 7, 8 days by now) since TSMC actually taped out the first real Nv30 silicon. As I posted in another forums, there is simply no way that final silicon would be out in testers hands at this stage, generally given that there is 90 days between tape out and final silicon. On top of the known problems TSMC is having going to .13 processing (relaibly).

Saist, a minor question what do you mean when you say "since TSMC actually taped out the first real Nv30 silicon"?

I find this comment somewhat confusing..... TSMC has absolutely nothing to do with the tape-out of the NV30. A tape-out takes the same length of time regardless of what process it's fabrciated it, and TSMC's .13u issues have no bearing on when the NV30 tapes out.

A tapeout occurs when the design team sends the mask design to the foundry. If nVidia only recently sent the design off to TSMC it'll take an additional 6-8 weeks before the mask is manufactured, and test samples are finished and sent back to nVidia.

TSM and their .13u process has no bearing on when nVidia tapes out the NV30 design, they only come into play after the NV30 has taped-out.

 

[Saist]

I'm sorry Rand.

I was under the impression given during Nvidia's Q2 talks when the tape-out was mentioned, that it was TSMC who had finally gotten the machines to produce the first "real silicon" versions of the NV30 chip, and were busy configuring the equipment to go mass. Appearently though, it is Nvidia that produces the working silicon? Then sends it to TSMC?

I freely admit to not being certain on the process of going from paper to the silicon... sorry for being confusing to you.

 

[merlocka]

Originally posted by: Saist
I'm sorry Rand.

I was under the impression given during Nvidia's Q2 talks when the tape-out was mentioned, that it was TSMC who had finally gotten the machines to produce the first "real silicon" versions of the NV30 chip, and were busy configuring the equipment to go mass. Appearently though, it is Nvidia that produces the working silicon? Then sends it to TSMC?

I freely admit to not being certain on the process of going from paper to the silicon... sorry for being confusing to you.

"Tape out" is a funny term from back in the day (before we had voodoo cards to benchmark) when IC's weren't designed using CAD, but actually from plots. Traces could be done with tape. Hence the term "taping out" a chip.

It now refers to the process of packaging the design files and sending them to fab.

TSMC takes the design files and in 6-8 weeks has the dies on wafer. The dies are then packaged (a completly different step) and then send back to nVidia.