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New stepping E6300, E6400, 3040, 3050

NoobyDoo

Senior member
B-2 To L-2 Stepping For 2MB Conroes

Intel® is initiating a B-2 to L-2 stepping conversion for Intel® Core?2 Duo processors E6300 & E6400 (Conroe) and Dual-Core Intel® Xeon® processors 3040 & 3050 (UP Xeon processors based on Conroe) where they will undergo the following changes:
? New S-Spec and MM numbers for the converting products
? CPUID will change from 6F6 to 6F2
? Extended HALT power specification will reduce from 22 Watts to 12 Watts
? Die size optimized for manufacturability
? Minor visible difference between the B-2 and L-2 packages; see below for a visual comparison
? L-2 package is pin compatible with B-2 package
 
The L-2 Stepping was supposed to indicate E4300, E4400. Apparently they have decided it was good enough to start releasing them as E6300 and E6400 as well. There are some Conroe E6600+ B3 steppings floating around as well. They are Week 33 and above. Just got one back from RMA.
 
i've got a new 6300 waiting for me to get home from school, i'll have week/steppings/revision and OC results up by friday.
 
According to this CPUID 6F2 is Allendale/(Native)2MB :

Similarly, Merom will also get native 2MB L2 cache version at the time of Santa Rosa release.
The 2MB L2 Cache Conroe included Core 2 Duo E6300 (1.86GHz/1066MHz FSB), E6400 (2.13GHz/1066MHz FSB) and Xeon 3040 (1.86GHz/1066MHz FSB)?3040(2.13GHz/1066MHz FSB), where its stepping would improved from B2 to L2. They have new SSPEC and MM, and CPUID would changed from 6F6 to 6F2. However, the change would not affect those manufacturers as well as end users.
As AMD is stepping in 65nm process soon, its cost efficiency is the biggest advantage for the company to against Intel. As 4MB L2 Cache shared almost 60% of the transistors in Conroe, a cut to native 2MB L2 Cache may help in lower 20% of the cost. In fact, the L2 stepping samples have been sent to mainboard manufacturers in order to update the microcode for BIOS.
 
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