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New Dual-core opterons to be pin-for-pin compatible

Mark R

Diamond Member
Rumour from the enquirer suggests that AMD's ehanced dual-core opteron CPUs will be coming next year. Interestingly, for those with thousands of $ invested in multi-way server motherboards, these enhanced CPUs are set to feature the exact same pin-out. This could open-up a simple plug-and-play upgrade path.

Link
 
I would imagine this is for 939 cpus, that would explain all the extra grounds as well.

I'm almost certain that would require special support and will require a new mobo, even if it is the same socket, because of the power draw to the socket and obviously firmware support.
 
According to the EWeek article it will be compatible.

One of the most powerful things next year is going to be our dual-core product. To me, that's going to really shock the hell out of everyone, because it's going to be hardware-compatible, infrastructure-compatible, pin-compatible. I mean, people that have a 2-P system can slap in a dual-core product and end up with a 4-P system for the price of a 2-P. That's been the biggest drawback, everyone tells me. What keeps them from going from a 2-P to a 4-P system? It's price.
 
Call me a pessimist, but I'm not so sure on pin-for-pin compatibility. Data signals should be fine, but what about power? 2 cores is almost twice the power comsumption; can Socket939/940 handle that kind of power draw?

Edit: Never mind, I didn't RTFA, and didn't realize that it was Hector being quoted. I still wonder how AMD managed to pull off the power requirements though
 
Originally posted by: beatle
I also wonder what the cooling systems for chips like these will look like. :Q

like intels' ? 😉

hehe, I still wonder how it'll really work together I assume they'll use shared L1 and L2 cache, since MP systems also exchange the data in their caches so it would only be logical ...
 
Originally posted by: KristopherKubicki
Sure pin for pin it will work - but you will probably need a new chipset.

Kristopher
Couldn't they just do an internal HT link? IIRC, you don't need a specialized chipset for multiple Opterons until you go above 8 CPUs.
 
Originally posted by: ViRGE
Call me a pessimist, but I'm not so sure on pin-for-pin compatibility. Data signals should be fine, but what about power? 2 cores is almost twice the power comsumption; can Socket939/940 handle that kind of power draw?

Edit: Never mind, I didn't RTFA, and didn't realize that it was Hector being quoted. I still wonder how AMD managed to pull off the power requirements though

They might have designed the chip with the capacity available for this type of expansion. It's been done before...

-Por
 
Originally posted by: PorBleemo
Originally posted by: ViRGE
Call me a pessimist, but I'm not so sure on pin-for-pin compatibility. Data signals should be fine, but what about power? 2 cores is almost twice the power comsumption; can Socket939/940 handle that kind of power draw?

Edit: Never mind, I didn't RTFA, and didn't realize that it was Hector being quoted. I still wonder how AMD managed to pull off the power requirements though

They might have designed the chip with the capacity available for this type of expansion. It's been done before...

-Por

Yep...the HP PA-8800 and Sun UltraSPARC IV, both dual-core processors and released earlier in the year, are drop-in compatible with existing system designs. The dual-core Itanium coming out next year will be as well.
 
Originally posted by: MDE
Originally posted by: KristopherKubicki
Sure pin for pin it will work - but you will probably need a new chipset.

Kristopher
Couldn't they just do an internal HT link? IIRC, you don't need a specialized chipset for multiple Opterons until you go above 8 CPUs.

Ya it seems pretty plausable since so much of what used to be on the northbridge is now on the CPU... it might be possible without even as much as a chipset upgrade.
 
boran-

Nope, separate L1 and L2 caches. The two CPU's tie in with a common SRQ, meaning they also share common HT links and the integrated X-Bar memory controller(s). AMD had also patented during the pre-K8 release period a cache snoop between CPU's, so its likely they will use something like that and the SRQ to tranfer cache information on demand.

The dual core could be AMD's K9 program. Nobody knows for sure right now.
 
Originally posted by: MadRat
boran-

Nope, separate L1 and L2 caches. The two CPU's tie in with a common SRQ, meaning they also share common HT links and the integrated X-Bar memory controller(s). AMD had also patented during the pre-K8 release period a cache snoop between CPU's, so its likely they will use something like that and the SRQ to tranfer cache information on demand.

The dual core could be AMD's K9 program. Nobody knows for sure right now.

But wouldn't that lower performance? Much like the current Xeon situation?

-Por
 
But wouldn't that lower performance? Much like the current Xeon situation?
I don't think it can really be helped. When you go to multiprocessor, you gotta do extra stuff to keep memory/caches coherent.

Hey! I remember when a company came out with a special adapter to make a dual proc 486 fit into any 486 MB!
 
Cool technology.

But I expect that this may actually DEGRADE performance for single threaded stuff like video games.

Because the cpu's are probably going to be clocked slower and be much more expensive to produce, then with most vid games your only going to be use one half of the cpu at a time.

But I would buy these chips in a heartbeat. Right now when I rip cds I do them two at a time, one on each IDE channel, having a SMP setup will speed that up considurably. Multitasking is were it's at.

Also sounds like yet another technology given to them by IBM, I bet stuff like this pisses off intel.
 
Originally posted by: drag
Cool technology.

But I expect that this may actually DEGRADE performance for single threaded stuff like video games.

Because the cpu's are probably going to be clocked slower and be much more expensive to produce, then with most vid games your only going to be use one half of the cpu at a time.

But I would buy these chips in a heartbeat. Right now when I rip cds I do them two at a time, one on each IDE channel, having a SMP setup will speed that up considurably. Multitasking is were it's at.

Also sounds like yet another technology given to them by IBM, I bet stuff like this pisses off intel.

A lot of games out now and coming in the future are SMP aware. The Doom 3 engine is, All of Sony Online Entertainments current and up and coming games are SMP aware except Everquest.

Theres a big list but im too lazy to look it up 😛

Game developers are likely to wise up this year and make even more SMP compatible titles because of HT, and the fact that new GPUs are CPU limited even with a FX-53/3.4EE/3400+.
 
This might sound like a line, but I have a friend who works for AMD. He didn't go into deep details because he signed an NDR, but after AMD mentioned it publically he did confirm to me dual-core opterons with drop-in compatibility. (He didnt' tell me how they did it though.)

I'll see if I can get him to spill some beans 🙂
 
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