New chip architecture, 3D!

GauteHauk

Junior Member
Apr 7, 2006
18
0
0
3d chip architecture! Killer sounding, especially the possible benefits. Now, to see it get off the ground...


http://www.dailynexus.com/news/2004/6670.html

http://www.sciencedaily.com/releases/2005/09/050910085819.htm


"The Boeing Company gave four patents to UCSB that describe technology used in making multi-layered, three-dimensional microchips. Kaustav Banerjee, an assistant professor of electrical and computer engineering, is leading the project and said he hopes to use the patents to build prototypes of the new chips.

A chemical etching process performed on a flat silicon wafer makes traditional integrated circuits, such as the Intel Pentium line. The new multi-layering techniques outlined in the patents describe how to build an integrated circuit in layers stacked to produce a three-dimensional shape, Banerjee said.

The new method saves space, by giving the integrated circuit a smaller footprint, but the real benefits include huge speed increases, versatility and lower heat production. Also, the prestige of having the patents may entice organizations to grant UCSB money for further research, Banerjee said."



"One of the major benefits of the stacked design is that the wiring from one part of the chip to another can be shorter, Banerjee said. In a conventional flat chip design, a wire must run from one edge clear across the surface to send a signal.

In a stacked design, the wire may be able to connect two layers vertically, which can be a much shorter distance. This design allows for much improved performance and lower heat production."



"Additionally, heat management is more of a problem in the three-dimensional integrated circuits than it is in conventional circuits because there is less surface area to dissipate the heat, Banerjee said.

?The fourth patent, which is also very important, relates to heat removal,? said Banerjee. ?When you make this 3-D package, the upper layers are going to generate heat, and typically the heatsink is attached to only one side of the chip.?

One of the patents describes a particular way to use tiny heat-moving devices called Peltier junctions to control the heat distribution within the layered integrated circuit."



Full story on their site. Very cool concept. Honestly, I was thinking this myself, a few minutes. I figured, heat dissipation would be difficult, speed of chips would increase, but had no idea if someone else had thought of it yet. Cool to see someone has! (No, I don't think I'm some sort of genius, just thought it'd be a cool concept. The human brain comes to mind, excuse the pun.)

P.S. - Looking for more information on similar technology. It may be defunct with new techs coming out for storage of data, but it looks promising. Will post any more cool stuff I find.
 

BrownTown

Diamond Member
Dec 1, 2005
5,314
1
0
3D chips are something that lots of people talk about in terms of improving performance since you can get alot of transistors really close together when compared to planar semiconductors. However, it should be noted that current chips already have many layers, but the transistors are all on one layer, and the other layers carry the signal wires.
 

GauteHauk

Junior Member
Apr 7, 2006
18
0
0
Jeez. Harsh learning curve in tech. I've no problem with being corrected. I just -love- learning new things about upcoming technologies. I guess lesson learned here is to learn of existing technology first, eh? Still, cool concept and something I haven't heard of before.
 

borealiss

Senior member
Jun 23, 2000
913
0
0
thermal efficiency is one big question here. the second one is the cost to retool to make this kind of process practical. think of it this way, mazda releases a rotary engine and that's great as it has a lot of areas where it could be much more efficient than a piston-driven engine. but so much R&D is poured into piston-driven motors that by the time mazda has built a better rotary, the entire industry has already leapfrogged them. the question of whether or not it can be done isn't that important. what is is whether or not it can become practical enough to consider over traditional semiconductors. maybe in niche markets where space is of concern and thermal dissipation efficiency isn't as important.
 

GauteHauk

Junior Member
Apr 7, 2006
18
0
0
Very interesting information, there. "Question isn't 'can we do it,' question is 'is it practical'." Thanks for the reasonable replies.

Only question is, anyone heard anything about information on this process maybe becoming practical? I would think it'd be big news, since it would offer such a benefit(smaller package, bigger bang, think -human brain-like architecture) so I would guess it'd be pretty loudly vocalized on news networks and such.

Yeah, and not to try to bump this post. Just one last question before I let this post sink into obscurity.
 

BrownTown

Diamond Member
Dec 1, 2005
5,314
1
0
Well, currently scaling down the process size gives you all the advantages of making 3D chips (shorter traces, higher densities) without complicating the heat problem, or requiring such a signifigant departure from chip design. Its just alot easier to get the qualities you want by scaling to smaller processes than to layer silicon. If/when at some point in the it becomes impossible to scale transistor deminions any further then the only way to pack transistors closer together will be 3D architectures and companies will invest in it at that point. It is something that is likely to happen, but just isn't economically viable at this point. Like you stated, it is not a radical departure from how things are done now as it may seem.