Why not compare DDR with Yellowstone (upcoming memory from Rambus with a whooping bandwidth of 6,2Gb/sec, current Rambus is 3,2)
That current bandwidth number you gave is wrong. Current PC800 16-bit data path RDRAM as delivered from Rambus (your context) has a bandwidth of 1.6GB/sec; the 3.2GB/sec you quoted is the bandwidth achieved on the 850 due to Intel's implementation of dual channels of 16-bit data path RDRAM. You can go check
this genuine Rambus PDF on 32-bit and 64-bit RIMMs yourself. There's a table on page 4 that gives you the comparative bandwidths of each module. If you don't believe me, try running an i850 with only one RIMM and see what happens. If you really want to compare dual channel-to-dual channel performance, why not wait for the nForce 420 where nVidia has optimized memory performance with 2 DDR DIMMs? If you don't think this matters, bench your Abit KT7A with 4-way memory interleaving off and on and you'll get the idea.
As for that 6.2GB/sec (or 6.4GB/sec according to Rambus) number, their roadmap (linked at the bottom of this post) shows them delivering that module bandwidth in 2003.
Be cause guys like stop can't seem to stop b*tching about the poor performance and price of Rambus (is it so bad??)
Poor performance? Considering Rambus' bandwidth numbers, definitely. You raised the latency issue, not me. Poor price? Yes - only recently has the signficant price premium over DDR narrowed. Poor price/performance ratio? Yes.
As for b*tching about Rambus, errr...never mind.
Rambus is doing pretty fine actually
Talked to any Rambus shareholders lately?
It's only doing "fine" because Intel is forcing it onto the market - if you've wanted a P4 up to now you've HAD to buy Rambus. I don't see AMD, VIA, SiS or ALi marketing chipsets supporting Rambus - they may have licenses, but I don't see them using it. Like
Craig Barrett just recently said, "the consumer will decide" the fate of Rambus. Interesting words from the president of Intel. We'll also see how Rambus does when it's exclusivity deal with Intel is over - for that matter, we'll see real soon how well RDRAM sells when SDR/DDR P4s are available with Intel's blessing. I expect we'll see the i820 vs. i815 story all over again.
Northwood is gonna support it and ThII-7 supports Northwood and also Yellowstone
I don't see how Northwood is going to have specific Yellowstone support, especially considering that the SDR/DDR i845 also supports Northwood. It seems the issue is whether the chipset supports it. For that matter, technically Northwood will also support PC100, PC133, PC150, PC166, PC1600, PC2100, PC2400 and PC2700 DRAM.
As for the TH7-II/i850 supporting it - well that's an interesting postulation. Right now, the one confirmed fact from Rambus is that Samsung will start volume introduction of PC1066 RDRAM in 2002. If you look back at the PDF I pointed out earlier, you'll see the specs for PC1066 RDRAM are listed. With a 16-bit data path bandwidth is 2.1GB/sec; on an Intel dual channel platform that's 4.2GB/sec - about a 30% increase. Not a huge deal considering they haven't dealt with latency with PC1066 either. I'll assume that Yellowstone isn't PC1066 for the moment, although their timetables are curiously similar and that would make Yellowstone no BFD. If Yellowstone isn't PC1066, then I'd be REAL surprised to see that Yellowstone sticks with a 16-bit datapath, particularly since Rambus is aggressively pushing 32-bit and 64-bit data paths. If Yellowstone doesn't have a 16-bit data path, I'd like to know how the existing i850 will support a 32-bit datapath considering the i850's pinout. For that matter, the TH7-II's current RIMM sockets don't even support 32-bit RIMMs. You can check the TH7-II's sockets over at
FiringSquad yourself.
If Yellowstone
is PC1066, then you're not talking about Northwood, you're talking about Tulloch, the Intel chipset with official PC1066 support due out Q2 or so next year.
SIS 645 is still planned for 4Q so is Yellowstone
The 645 is
sampling, not "planned" this month and in mass production next month. That's Q3 not Q4. SiS 645 boards may not actually be on the street until the beginning of Q4, but SiS will be spitting 645 chipsets out of its own fabs in Q3 while Yellowstone's only visible implementation will be in PowerPoint. If you don't think this is possible, look at the time between when SiS started production of the SiS 735 and when the ECS 735 boards showed up on the street.
one word:
latency
Yellowstone will proberly fix this issue.
Really? I find it kind of curious that in
Rambus' RIMM Module Roadmap to 9.6GB/s Modules presentation, that in 36 pages of slides they never ONCE mention the words "latency" or "latencies." 32-bit and 64-bit datapaths, yes. Gobs of bandwidth, yes. Latency, no. From their current implementation, they obviously don't know what it is. But hey, latency is irrelevant when you've got 9.6GB/sec of bandwidth, right?