The controller chip on the SATA optical identifies as serial, but it can be run in "legacy" mode in very recent mobo bios
And, you guys beter look carefully in your mobo manual - some SATA ready chipsets or addon chips dont support OPTICAL SATA drives on their individual ports
and the whole "IDE" thing would take me half hour to explain
all current drives are IDE - integrated drive electronics - the controller chip and all related data circuitry is on the drive PCB, as opposed to the old ancient days.
there is no such thing as IDE transfer, tansfers are ATA/ATAPI protocol
There is parrallel transfer, 40 wire, or 40 wire + 40 ground plane Xtalk shields (80 wire)
There is serial transfer - 7 wire with 2 up and 2 down data, 3 shield
Parallel has many data paths but low frequency (at limit now), serial has few channels but much higher frequency, much lower voltage
serial uses the same parallel ATA/ATAPI protocol as parallel
serial "drivers" add serial specific features, defacto stopping "bridging", also allow drive controller detection by XP
Its all about words and how they are employed in daily use.
Like the P5WDH mobo bios has things like RAID BASIC or ACHI for the JMicron SATA controller
ACHI forces "native mode" or SATA only and may not run optical
Basic is "legacy mode" or "IDE mode" and even regular MS non specific drivers will work
Quote from seagate:
Are there differences in SATA solutions by different HDD vendors?
Yes, there are two main methods for establishing the SATA interface on the disc drives and hosts, native and bridge.
The native method allows maximum throughput, bypassing the
legacy Task File reads and writes, as well as the limitation of 133 Mbytes/sec for Ultra DMA Mode 6 transfers, enable the maximum 150 Mbytes/sec transfer rate for first-generation SATA devices.
A bridge solution enables the adaptation of a parallel device to the SATA interface. Because the SATA information flow occurs at 1.5 Gbits/sec, it is not always possible for the Link-state machines to keep up when using a bridge device. The link layers on a bridged system must incorporate buffering to allow for throttling the interface if one side gets behind.
More inside info:
http://www.ata-atapi.com/sata.htm