CPU: E8400 E0 (batch QxxxBxxx VID 1.1)
Board: P35 ASUS P5K-E rev A2 bios 1305 (latest)
RAM: G.Skill F2-8000CL5-2GBPQ x2 = 4GB (rated 400MHz@5-5-5-15@1.8V and 500MHz@5-5-5-15@2.1V)
My initial idea was to start examining the limits of various important system variables while using the lowest available voltages in BIOS for CPU,NB,RAM etc.
The most important stress test seems to be the capability of POST and booting to windows. When the settings are on the edge, LinX with 64mb and 20 runs is a fast and quite reliable test. I consider passing this "stable" candidate. When I find nice settings I run LinX with a bit heavier settings for 20-30min.
450FSB with 1:1 = 900MHz RAM is "stable" (loose settings everywhere else..)
Default settings CAS latency is: 12.5ns
I managed to get the following "stable" with loose settings everywhere else (FSB~300):
10.9ns
10.52ns
10.34ns
9.984ns
However, I got memory instability with 10.0ns CL later with 800MHz RAM (4-5-5-15) 5:6 divider. Rising CL to 5 clocks was stable again. Any ideas why CL stability ns limit changed between different divider/FSB/RAM freq? Does that happen, or did I make an error somewhere?
So far it seems that my CPU stability limit is between 333-350FSB=(3000-3150MHz)@1.1V BIOS setting/1.06V hwmonitor idle. I guess this is typical for this CPU?
tRD(performance level) limit with otherwise loose settings (except CL):
21.02ns ok
18.18ns ok
16.39ns ok
15.15ns crash
I got some strange result while searching for the highest RAM freq @ 1.8V, so officially I haven't done that yet. Does 1033MHz@1.8V 6-6-6-15 3:5 divider sound realistic btw? I upped it to 1066MHz (FSB to 320) and got a "dual boot" style shut down and restart, and it didn't POST. I thought that would only happen when something bigger changes than simple FSB/RAM freq change (like divider or strap)? From 1001 to 1033 there was no such transition.
I also tested 1:2 divider to keep RAM freq high for testing, but I couldn't POST with 200FSB (=800MHz RAM). Is it supposed not to work with that low FSB? I'm not sure if I trust all those other dividers than 1:1 after some strange results.. =P
Also 7-7-7-(18 to 21) doesn't seem to POST at all.. though I won't need that loose timings there.
---
Update
Things seem to be more clear when I limit my tests to the dividers/speeds I actually need.
Voltage/frequency limits for CPU so far:
340x9 needs 1.1V BIOS 1.048-1.064V actual (lowest) 33-50C
385x9 needs 1.2V BIOS 1.144-1.168V actual (probably a bit headroom left, not much) 35-60C
Lowest stable tRD so far: ~15.58ns @1.25V
Lowest stable CL so far: 10.4ns
Highest stable RAM freq so far: 513MHz(1026) 6-6-5-15 @1.8V
Board: P35 ASUS P5K-E rev A2 bios 1305 (latest)
RAM: G.Skill F2-8000CL5-2GBPQ x2 = 4GB (rated 400MHz@5-5-5-15@1.8V and 500MHz@5-5-5-15@2.1V)
My initial idea was to start examining the limits of various important system variables while using the lowest available voltages in BIOS for CPU,NB,RAM etc.
The most important stress test seems to be the capability of POST and booting to windows. When the settings are on the edge, LinX with 64mb and 20 runs is a fast and quite reliable test. I consider passing this "stable" candidate. When I find nice settings I run LinX with a bit heavier settings for 20-30min.
450FSB with 1:1 = 900MHz RAM is "stable" (loose settings everywhere else..)
Default settings CAS latency is: 12.5ns
I managed to get the following "stable" with loose settings everywhere else (FSB~300):
10.9ns
10.52ns
10.34ns
9.984ns
However, I got memory instability with 10.0ns CL later with 800MHz RAM (4-5-5-15) 5:6 divider. Rising CL to 5 clocks was stable again. Any ideas why CL stability ns limit changed between different divider/FSB/RAM freq? Does that happen, or did I make an error somewhere?
So far it seems that my CPU stability limit is between 333-350FSB=(3000-3150MHz)@1.1V BIOS setting/1.06V hwmonitor idle. I guess this is typical for this CPU?
tRD(performance level) limit with otherwise loose settings (except CL):
21.02ns ok
18.18ns ok
16.39ns ok
15.15ns crash
I got some strange result while searching for the highest RAM freq @ 1.8V, so officially I haven't done that yet. Does 1033MHz@1.8V 6-6-6-15 3:5 divider sound realistic btw? I upped it to 1066MHz (FSB to 320) and got a "dual boot" style shut down and restart, and it didn't POST. I thought that would only happen when something bigger changes than simple FSB/RAM freq change (like divider or strap)? From 1001 to 1033 there was no such transition.
I also tested 1:2 divider to keep RAM freq high for testing, but I couldn't POST with 200FSB (=800MHz RAM). Is it supposed not to work with that low FSB? I'm not sure if I trust all those other dividers than 1:1 after some strange results.. =P
Also 7-7-7-(18 to 21) doesn't seem to POST at all.. though I won't need that loose timings there.
---
Update
Things seem to be more clear when I limit my tests to the dividers/speeds I actually need.
Voltage/frequency limits for CPU so far:
340x9 needs 1.1V BIOS 1.048-1.064V actual (lowest) 33-50C
385x9 needs 1.2V BIOS 1.144-1.168V actual (probably a bit headroom left, not much) 35-60C
Lowest stable tRD so far: ~15.58ns @1.25V
Lowest stable CL so far: 10.4ns
Highest stable RAM freq so far: 513MHz(1026) 6-6-5-15 @1.8V
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