It's being driven with a cmos driver. The time constant you calculated would only be relevant if the microcontroller tri-states its output pin in order to let the pulldown resistor drain the gate charge, which is not the case. Superposition of the node means the 10k is doing practically nothing other than preventing it from floating.
TuxDave already came up with the most likely scenario. We're simply waiting on more information to confirm. The configuration of the FET is almost certainly the issue, not the sink capability of the microcontroller.
If the Led is connected according to trhe second schematic ,
that is at the source , the driver can have trouble reaching
the gate/source threshold voltage since the source is floating,
hence requiring even more gate voltage in respect of the ground.
If the Cmos driver has enough current sink capability it could
then easily brought the gate to ground potential , switching
the unperfectly conducting device even faster than with the first
arrangement.
Besides , we still dont know the pulse width and frequency ,
so it s somewhat early to make a guess other than the one
that the OP lack of precisions is perhaps deliberate....
