Article
"IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008"
And on whether or nor they can achieve it by mid-2008
CNet article
"One of the big questions in the chip industry today is whether Advanced Micro Devices can make the hop to 45-nanometer manufacturing in 18 months, as the company has promised. One prominent analyst says that, so far, the chances look good"..."AMD (and its development partner IBM) have reduced the defect density, the measure of defects per square centimeter) on its test 45-nanometer chips. "The big issue is defects, which IBM and AMD seem to have a leg up on,"
"IBM and AMD presented papers describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation. AMD and IBM expect the first 45nm products using immersion lithography and ultra-low-K interconnect dielectrics to be available in mid-2008"
And on whether or nor they can achieve it by mid-2008
CNet article
"One of the big questions in the chip industry today is whether Advanced Micro Devices can make the hop to 45-nanometer manufacturing in 18 months, as the company has promised. One prominent analyst says that, so far, the chances look good"..."AMD (and its development partner IBM) have reduced the defect density, the measure of defects per square centimeter) on its test 45-nanometer chips. "The big issue is defects, which IBM and AMD seem to have a leg up on,"