Memory copy, RAM transfer rates

[HolyFire]

Hi. I have several questions which are somewhat related.

1) In a Core 2 system, suppose I have a large, contiguous block of data in RAM, of which a currently running process wants to make a copy (to be placed in a different location in RAM). Does the CPU simply instruct the memory controller "copy the block beginning here and ending there to this location", with the northbridge taking it from there, or is there more "hands-on" involvement of the CPU in the copy process? In particular, does all the data copied have to go through the CPU first?

2) Suppose I have a Core 2 system running at an FSB of 400MHz (1600 MT/s quad-pumped). The minimum speed I can run DDR2 RAM in this case (at least, with all motherboards I know of) is 800 MT/s. Each transfer of the FSB is 64 bits, so the total transfer rate is 12.8GB/s. Meanwhile, the transfer rate of the RAM is 6.4GB/s per channel, so with dual-channel the total is 12.8GB/s. Does this mean that any further increase in RAM speed will have no effect on the rate of data transfer between the CPU and RAM?

3) What are the advantages to running RAM at above the minimum speed? One is probably reduced latencies, but this seems less important. If the answers to #1 and #2 are "no" and "yes", I'd say the main significance is improved performance in memory-copy scenarios. Is this right?

Thanks.

 

[bobsmith1492]

Look up DMA - direct memory access. Many peripherals can access RAM directly, more or less, without any involvement of the CPU. Even microcontrollers often include this feature for peripherals.

Essentially what you describe in (1) is DMA.

 

[dinkumthinkum]

No, (1) is not DMA. He is describing simple memory-to-memory moves e.g. the "movs" family of instructions. While it is possible to setup a block transfer using "rep movsw" or similar, the CPU is still involved with the transfer of every unit. I'm pretty sure that on modern Intel microprocessors the movsw instruction is microcoded and translates into various lower level instructions which load values from memory and store them back.

Chapter 2.2.6 of the Intel Architecture Reference manual goes into more detail.

 

[lambchops511]

Originally posted by: HolyFire
Hi. I have several questions which are somewhat related.

1) In a Core 2 system, suppose I have a large, contiguous block of data in RAM, of which a currently running process wants to make a copy (to be placed in a different location in RAM). Does the CPU simply instruct the memory controller "copy the block beginning here and ending there to this location", with the northbridge taking it from there, or is there more "hands-on" involvement of the CPU in the copy process? In particular, does all the data copied have to go through the CPU first?

2) Suppose I have a Core 2 system running at an FSB of 400MHz (1600 MT/s quad-pumped). The minimum speed I can run DDR2 RAM in this case (at least, with all motherboards I know of) is 800 MT/s. Each transfer of the FSB is 64 bits, so the total transfer rate is 12.8GB/s. Meanwhile, the transfer rate of the RAM is 6.4GB/s per channel, so with dual-channel the total is 12.8GB/s. Does this mean that any further increase in RAM speed will have no effect on the rate of data transfer between the CPU and RAM?

3) What are the advantages to running RAM at above the minimum speed? One is probably reduced latencies, but this seems less important. If the answers to #1 and #2 are "no" and "yes", I'd say the main significance is improved performance in memory-copy scenarios. Is this right?

Thanks.

Data transfer has to go through CPU, a dumb transfer would transfer 1 byte (8 bits) per clock, a more sophisticated would be using SSE instructions and transfer 128 bits per clock

12.8GB/s doesn't include all the overhead, I would subtract something like 20% for overhead. I forgot off the top of my head the busspeed between the northbridge and the CPU. I'll look into it later if you are really interested.

3, if you are talking about buying faster RAM, there really is no point - another point you have to consider, when copying Memory -> Memory, are they on the same channel? or different channel? you really have no control over this as well, as its all abstracted in the Kernel/MMU

 

[HolyFire]

Ok, thanks.